Computer Networks MCQ Set 1
1. ______ have been developed specifically for pipelined systems.
a) Utility softwares
b) Speed up utilities
c) Optimizing compilers
d) None of the mentioned
Answer
Answer: c [Reason:]
2. The pipelining process is also called as ______
a) Superscalar operation
b) Assembly line operation
c) Von neumann cycle
d) None of the mentioned
Answer
Answer: b [Reason:]
3. The fetch and execution cycles are interleaved with the help of ________
a) Modification in processor architecture
b) Clock
c) Special unit
d) Control unit
Answer
Answer: b [Reason:]
4. Each stage in pipelining should be completed within ____ cycle.
a) 1
b) 2
c) 3
d) 4
Answer
Answer: a [Reason:]
5. In pipelining the task which requires the least time is performed first.
a) True
b) False
Answer
Answer: b [Reason:]
6. If a unit completes its task before the allotted time period, then
a) It’ll perform some other task in the remaining time
b) Its time gets reallocated to different task
c) It’ll remain idle for the remaining time
d) None of the mentioned
Answer
Answer: c [Reason:]
7. To increase the speed of memory access in pipelining, we make use of _______
a) Special memory locations
b) Special purpose registers
c) Cache
d) Buffers
Answer
Answer: c [Reason:]
8. The periods of time when the unit is idle is called as _____
a) Stalls
b) Bubbles
c) Hazards
d) Both Stalls and Bubbles
Answer
Answer: d [Reason:]
9. The contention for the usage of a hardware device is called as ______
a) Structural hazard
b) Stalk
c) Deadlock
d) None of the mentioned
Answer
Answer: a [Reason:]
10. The situation where in the data of operands are not available is called ______
a) Data hazard
b) Stock
c) Deadlock
d) Structural hazard
Answer
Answer: a [Reason:]
Computer Networks MCQ Set 2
1. RamBUS is better than the other memory chips in terms of
a) Efficiency
b) Speed of operation
c) Wider bandwidth
d) All of the mentioned
Answer
Answer: b [Reason:]
2. The key feature of the RAMBUS tech is ________
a) Greater memory utilisation
b) Effeciency
c) Speed of transfer
d) None of the mentioned
Answer
Answer: c [Reason:]
3. The increase in operation speed is done by
a) Reducing the reference voltage
b) Increasing the clk frequency
c) Using enhanced hardware
d) None of the mentioned
Answer
Answer: a [Reason:]
4. The data is transfered over the RAMBUS as _______
a) Packets
b) Blocks
c) Swing voltages
d) Bits
Answer
Answer: c [Reason:]
5. The type of signaling used in RAMBUS is ______
a) CLK signalling
b) Differential signalling
c) Integral signalling
d) None of the mentioned
Answer
Answer: b [Reason:]
6. The special communication used in RAMBUS are _________
a) RAMBUS channel
b) D-link
c) Dial-up
d) None of the mentioned
Answer
Answer: a [Reason:]
7. The original design of the RAMBUS required for ________ data lines.
a) 4
b) 6
c) 8
d) 9
Answer
Answer: d [Reason:]
8. The RAMBUS requires specially designed memory chips similar to _____
a) SRAM
b) SDRAM
c) DRAM
d) DDRRAM
Answer
Answer: c [Reason:]
9. A RAMBUS which has 18 data lines is called as _______
a) Extended RAMBUS
b) Direct RAMBUS
c) Multiple RAMBUS
d) Indirect RAMBUS
Answer
Answer: b [Reason:]
10. The RDRAM chips assembled into larger memory modules called ______
a) RRIM
b) DIMM
c) SIMM
d) All of the mentioned
Answer
Answer: a [Reason:]
Computer Networks MCQ Set 3
1. If the transistor gate is closed, then the ROM stores a value of 1.
a) True
b) False
Answer
Answer: b [Reason:]
2. PROM stands for __________
a) Programmable Read Only Memory
b) Pre-fed Read Only Memory
c) Pre-required Read Only Memory
d) Programmed Read Only Memory
Answer
Answer: a [Reason:]
3. The PROM is more effective than ROM chips in regard to _______
a) Cost
b) Memory management
c) Speed of operation
d) Both Cost and Speed of operation
Answer
Answer: d [Reason:]
4. The difference between the EPROM and ROM circuitory is _____
a) The usage of MOSFET’s over transistors
b) The usage of JFET’s over transistors
c) The usage of an extra transistor
d) None of the mentioned
Answer
Answer: c [Reason:]
5. The ROM chips are mainly used to store _______
a) System files
b) Root directories
c) Boot files
d) Driver files
Answer
Answer: c [Reason:]
6. The contents of the EPROM are earsed by ________
a) Overcharging the chip
b) Exposing the chip to UV rays
c) Exposing the chip to IR rays
d) Discharging the Chip
Answer
Answer: b [Reason:]
7. The disadvantage of the EPROM chip is _______
a) The high cost factor
b) The low efficiency
c) The low speed of operation
d) The need to remove the chip physically to reprogram it
Answer
Answer: d [Reason:]
8. EEPROM stands for Electrically Erasable Programmable Read Only Memory.
a) True
b) False
Answer
Answer: a [Reason:]
9. The disadvantage of the EEPROM is/are ________
a) The requirement of different voltages to read,write and store information
b) The Latency inread operation
c) The inefficient memory mapping schemes used
d) All of the mentioned
Answer
Answer: a [Reason:]
10. The memory devices which are similar to EEPROM but differ in the cost effectiveness is ______
a) Memory sticks
b) Blue-ray devices
c) Flash memory
d) CMOS
Answer
Answer: c [Reason:]
11. The only difference between the EEPROM and flash memory is that the latter doesn’t allow bulk data to be written.
a) True
b) False
Answer
Answer: a [Reason:]
12. The flash memories find application in ______
a) Super computers
b) Mainframe systems
c) Distributed systems
d) Portable devices
Answer
Answer: d [Reason:]
13. The memory module obtained by placing a number of flash chips for higher memory storage called as _______
a) FIMM
b) SIMM
c) Flash card
d) RIMM
Answer
Answer: c [Reason:]
14. The flash memory modules designed to replace the functioning of an harddisk is ______
a) RIMM
b) Flash drives
c) FIMM
d) DIMM
Answer
Answer: b [Reason:]
15. The reason for the fast operating speeds of the flash drives is
a) The absence of any movable parts
b) The itegarated electronic hardware
c) The improved bandwidth connection
d) All of the mentioned
Answer
Answer: a [Reason:]
Computer Networks MCQ Set 4
1. The directly mapped cache no replacement algorithm is required.
a) True
b) False
Answer
Answer: a [Reason:]
2. The surroundings of the recently accessed block is called as ______
a) Neighbourhood
b) Neighbour
c) Locality of reference
d) None of the mentioned
Answer
Answer: c [Reason:]
3. In set associative and associative mapping there exists less flexibility.
a) True
b) False
Answer
Answer: b [Reason:]
4. THe algorithm which replaces the block which has not been referenced for awhile is called _____
a) LRU
b) ORF
c) Direct
d) Both LRU and ORF
Answer
Answer: a [Reason:]
5. In associative mapping during LRU, the counter of the new block is set to ‘0’ and all the others are incremented by one, when _____ occurs.
a) Delay
b) Miss
c) Hit
d) Delayed hit
Answer
Answer: b [Reason:]
6. The LRU provides very bad performance when it comes to _________
a) Blocks being accessed is sequential
b) When the blocks are ramdomised
c) When the consecutive blocks accessed are in the extremes
d) None of the mentioned
Answer
Answer: a [Reason:]
7. The algorithm which removes the recently used page first is ________
a) LRU
b) MRU
c) OFM
d) None of the mentioned
Answer
Answer: b [Reason:]
8. The LRU can be improved by providing a little randomness in the access.
a) True
b) False
Answer
Answer: a [Reason:]
9. In LRU, the referenced blocks counter is set to’0′ and that of the previous blocks are incremented by one and others remain same, in case of ______
a) Hit
b) Miss
c) Delay
d) None of the mentioned
Answer
Answer: a [Reason:]
10. The counter that keeps track of how many times a block is most likely used is _______
a) Count
b) Reference counter
c) Use counter
d) Probable counter
Answer
Answer: b [Reason:]
Computer Networks MCQ Set 5
1. The key features of the SCSI BUS is
a) The cost effective connective media
b) The ability overlap data transfer requests
c) The highly effecient data transmission
d) None of the mentioned
Answer
Answer: b [Reason:]
2. In a data transfer operatioon involving SCSI BUS, the control is with ______
a) Initiator
b) Target
c) SCSI controller
d) Target Controller
Answer
Answer: d [Reason:]
3. In SCSI transfers the processor is not aware of the data being transfered.
a) True
b) False
Answer
Answer: a [Reason:] The processor or the controller is unaware of the data being transfered.
4. The DB(P) line means,
a) That the data line is carrying the device information
b) That the data line is carrying the parity information
c) That the data line is partly closed
d) That the data line is temporarily occupied
Answer
Answer: b [Reason:]
5. The BSY signal signifies
a) The BUs is busy
b) The controller is busy
c) The Initiator is busy
d) The Target is Busy
Answer
Answer: a [Reason:]
6. The SEL signal signifies
a) The initiator is selected
b) The device for BUS control is selected
c) That the target is being selected
d) None of the mentioned
Answer
Answer: b [Reason:]
7. ________ signal is asserted when the initiator wishes to send a message to the target.
a) MSG
b) APP
c) SMS
d) ATN
Answer
Answer: d [Reason:]
8. The MSG signal is used
a) To send a message to the target
b) To recieve a message from the mailbox
c) To tell that the information being sent is a message
d) None of the mentioned
Answer
Answer: c [Reason:]
9. _____ is used to reset all the device controls to their startup state.
a) SRT
b) RST
c) ATN
d) None of the mentioned
Answer
Answer: b [Reason:]
10. The SCSI BUS uses ______ arbitration.
a) Distributed
b) Centralised
c) Daisy chain
d) Hybrid
Answer
Answer: a [Reason:]