## Linear Integrated MCQ Set 1

1. How many sets of electrical specification are there for 741C op-amp?

a) Five

b) Eight

c) Two

d) Ten

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^{o}C , whereas the other set applies to the commercial temperature range from 0 to 70

^{o}C.

2. Calculate the input offset current from the circuit shown below:

a) +1.55mA

b) ±1.55mA

c) -1.55mA

d) None of the mentioned

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_{io}= |I

_{B1}-I

_{B2}| =|3.2 – 4.75|=|-1.55| => I

_{io}= +1.55mA.

3. What is the value of current drawn from power supply 741c op-amp?

a) I_{s} = 1.5mA

b) I_{s} = 3.2mA

c) I_{s} = 4.0mA

d) I_{s} = 2.8mA

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_{s}=2.8mA response.

4. Which is a time varying response?

a) Steady state response

b) Transient response

c) Both Steady state and transient response

d) None of the mentioned

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5. How is the equivalent input noise voltage and current?

a) Noise voltage = V^{2}/Hz and Noise current = A^{2}/Hz

b) Noise voltage = V^{3}/Hz and Noise current = A^{2}/Hz

c) Noise voltage = V^{2}/Hz and Noise current = A^{3}/Hz

d) Noise voltage = V^{3}/Hz and Noise current = A^{3}/Hz

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^{2}/Hz) and the equivalent input noise current as square noise current (A

^{2}/Hz).

6. The physical closeness of dual and quad package op-amp results in

a) Op-amp coupling

b) Amplifier to amplifier coupling

c) Channel coupling

d) Signal to noise coupling

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7. A parameter which is applicable only to dual and quad op-amp is

a) Channel separation

b) Gain bandwidth product

c) Long term input offset voltage stability

d) Equivalent input noise voltage and current

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8. Select the parameter that is not included in the evaluation for ac applications.

a) Gain-bandwidth product

b) Channel separation

c) Slew rate

d) All of the mentioned

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9. Which information is not included in a typical data sheet of op-amp?

a) Brief description of the basic type of the device

b) Pin configuration, package type & order information

c) Internal schematic diagram

d) Characteristics analysis of amplifier applications

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## Linear Integrated MCQ Set 2

1. Which of the following functions does the antilog computation required to perform continuously with log-amps?

a) In(x)

b) log(x)

c) Sinh(x)

d) All of the mentioned

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2. Find the circuit that is used to compress the dynamic range of a signal?

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3. Find the output voltage of the log-amplifier

a) V_{O} = -(kT)×ln(V_{i}/V_{ref})

b) V_{O} = -(kT/q)×ln(V_{i}/V_{ref})

c) V_{O} = -(kT/q)×ln(V_{ref}/V_{i})

d) V_{O} = (kT/q)×ln(V_{i}/V_{ref})

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_{O}=-(kT/q)×ln(V

_{i}/ V

_{ref}).

4. How to provide saturation current and temperature compensation in log-amp?

a) Applying reference voltage alone to two different log-amps

b) Applying input and reference voltage to same log-amps

c) Applying input and reference voltage to separate log-amps

d) None of the mentioned

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5. The input voltage, 6v and reference voltage, 4 v are applied to a log-amp with saturation current and temperature compensation. Find the output voltage of the log-amp?

a) 6.314(kT/q)v

b) 0.597(kT/q)v

c) 0.405(kT/q)v

d) 1.214(kT/q)v

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_{O}= (kT/q)×ln(V

_{i}/ V

_{ref}) =(kT/q)×ln(6v/4v) =(kT/q)×ln(1.5) V

_{O}= 0.405(kT/q)v.

6. Find the circuit used for compensating dependency of temperature in the output voltage?

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_{2}/ R

_{TC})] at the output of the log-amp with saturation current compensation. Now the output voltage becomes,V

_{O}= [1+ (R

_{2}/ R

_{TC})]×[(kT/q)×ln(V

_{i}/ V

_{ref})] Where, R

_{TC}–> temperature sensitive resistance with a positive co-efficient of temperature.

7. Determine the output voltage for the given circuit

a) V_{O} = V_{ref}/(10^{-k’vi})

b) V_{O} = V_{ref}+(10^{-k’vi})

c) V_{O} = V_{ref}×(10^{-k’vi})

d) V_{O} = V_{ref}-(10^{-k’vi})

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_{O}= V

_{ref}(10

^{-k’vi}) Where k’ = 0.4343 (q/kt)×[(R

_{TC}/ (R

_{2}+R

_{TC})].

8. Calculate the base voltage of Q_{2} transistor in the log-amp using two op-amps?

a) 8.7v

b) 5.3v

c) 3.3v

d) 6.2v

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_{2}transistor, V

_{B}= [R

_{TC}/ (R

_{2}+R

_{TC})]×(V

_{i}) = [10kΩ/(5kΩ+10kΩ)]×5v =3.33v.

## Linear Integrated MCQ Set 3

1. What is the conversion ratio of the phase detector in 565 PLL?

a) 0.14

b) 0.35

c) 0.4458

d) 0.7

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_{φ}= 1.4/π = 0.4458.

2. Given f_{o} = 1.2kHz and V = 13v, find the lock-in range of monolithic Phase-Locked Loop.

a) ±575Hz

b) ±720Hz

c) ±150Hz

d) ±1kHz

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_{L}= ±(7.8×f

_{o})/V = ±(7.8×1.2kHz)/13 = ±720Hz.

3. Find out the incorrect statement.

Monolithic phase detector is preferred for critical applications as it is:

1. Independent of variation in amplitude

2. Independent of variation in duty cycle of the input waveform

3. Independent of variation in response time

a) 1 & 2

b) 1 & 3

c) 2 & 3

d) 1, 2 & 3

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4. Determine the capture range of IC PLL 565 for a lock-in range of ± 1kHz.

a) △f_{c} = ±31.453Hz

b) △f_{c} = ±66.505Hz

c) △f_{c} = ±87.653Hz

d) None of the mentioned

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_{c}= ±[△f

_{L}/ (2π×3.6×10

^{3}×C]

^{0.5}= ±[1kHz/(2π×3.6×kΩ×10µF)]

^{0.5}= ±[1kHz/226.08×

^{-6}]

^{0.5}= [4423]

^{0.5}= ±66.505Hz.

5. Find the lock-in range of monolithic Phase-Locked Loop from the given diagram.

a) -f_{o}-△f_{L} to f_{o}-△f_{L}

b) -f_{o}-△f_{L} to -f_{o}-△f_{C}

c) f_{o}-△f_{L} to f_{o}-△f_{C}

d) -f_{o}-△f_{C} to f_{o}-△f_{C}

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_{o}-△f

_{L}to f

_{o}-△f

_{L}.

6. At what range the PLL can maintain the lock in the circuit?

a) Lock in range

b) Input range

c) Feedback loop range

d) None of the mentioned

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7. At which state the phase-locked loop tracks any change in input frequency?

a) Free running state

b) Capture state

c) Phase locked state

d) All of the mentioned

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## Linear Integrated MCQ Set 4

1. Determine output voltage of analog multiplier provided with two input signal V_{x} and V_{y}.

a) V_{o} = (V_{x} ×V_{x}) / V_{y}

b) V_{o} = (V_{x} ×V_{y} / V_{ref}

c) V_{o} = (V_{y} ×V_{y}) / V_{x}

d) V_{o} = (V_{x} ×V_{y}) / V_{ref}^{2}

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_{o}=V

_{x}×V

_{y}/ V

_{ref}.

2. Match the list-I with list-II

List-I | List-II |

1. One quadrant multiplier | i. Input 1- Positive, Input 2- Either positive or negative |

2. Two quadrant multiplier | ii. Input 1- Positive, Input 2 – Positive |

3. Four quadrant multiplier | iii. Input 1- Either positive or negative, Input 2- Either positive or negative |

a) 1-ii, 2-i, 3-iii

b) 1-ii, 2-ii, 3-ii

c) 1-iii, 2-I, 3-ii

d) 1-I, 2-iii, 3-i

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3. What is the disadvantage of log-antilog multiplier?

a) Provides four quadrant multiplication only

b) Provides one quadrant multiplication only

c) Provides two and four quadrant multiplication only

d) Provides one, two and four quadrant multiplication only

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4. An input of Vsinωt is applied to an ideal frequency doubler. Compute its output voltage?

a) V_{o} = [(V_{x}×V_{y}) /V_{ref}^{2}] × [1-cos2ωt/2].

b) V_{o} = [(V_{x}^{2}×V_{y}^{2}) /V_{ref}] × [1-cos2ωt/2].

c) V_{o} = [(V_{x}×V_{y})^{2} /V_{ref}] × [1-cos2ωt/2].

d) V_{o} = [(V_{x}×V_{y}) /( V_{ref}] × [1-cos2ωt/2].

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_{x}= V

_{x}sinωt and V

_{y}= V

_{y}sinωt => V

_{o}= (V

_{x}×V

_{y}× sin

^{2}ωt) / V

_{ref}= [(V

_{x}×V

_{y}) / V

_{ref}] × [1-cos2ωt/2].

5. Find the output voltage for the squarer circuit given below, choose input frequency as 10kHz and V_{ref} =10v

a) V_{o} = 5.0-(5.0×cos4π×10^{4}t)

b) V_{o} = 2.75-(2.75×cos4π×10^{4}t)

c) V_{o} = 1.25-(1.25×cos4π×10^{4}t)

d) None of the mentioned

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_{o}=V

_{i}

^{2}/ V

_{ref}=> V

_{i}= 5sinωt = 5sin2π×10

^{4}t V

_{o}= [5×(sin2π×10

^{4}t)

^{2}]/10 = 2.5×[1/2-(1/2cos2π ×2×10

^{4}t)] = 1.25-(1.25×cos4π×10

^{4}t).

6. Calculate the phase difference between two input signals applied to a multiplier, if the input signals are V_{x}= 2sinωt and V_{y}= 4sin(ωt+θ). (Take V_{ref}= 12v).

a) θ = 1.019

b) θ = 30.626

c) θ = 13.87

d) θ = 45.667

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_{o}= [V

_{mx}×V

_{my}/(2×V

_{ref})] ×cosθ => (V

_{o}×2×V

_{ref})/ (V

_{mx}× V

_{my}) = cosθ => cosθ = (10×2×12)/(2×4) = 30. => θ = cos

^{-1}30 =1.019.

7. Express the output voltage equation of divider circuit

a) V_{o}= -(V_{ref}/2)×(V_{z}/V_{x})

b) V_{o}= -(2×V_{ref})×(V_{z}/V_{x})

c) V_{o}= -(V_{ref})×(V_{z}/V_{x})

d) V_{o}= -V_{ref}^{2}×(V_{z}/V_{x})

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_{o}= -V

_{ref}×(V

_{z}/V

_{x}). Where V

_{z}–> dividend and V

_{x}–> divisor.

8. Find the divider circuit configuration given below

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9. Find the input current for the circuit given below.

a) I_{Z} = 0.5372mA

b) I_{Z} = 1.581mA

c) I_{Z} = 2.436mA

d) I_{Z} =9.347mA

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_{Z}= -(V

_{x}×V

_{o})/(V

_{ref}×R) = -(4.79v×16.5v)/(10×5kΩ) = 1.581mA.

10. Find the condition at which the output will not saturate?

a) V_{x} > 10v ; V_{y} > 10v

b) V_{x} < 10v ; V_{y} > 10v

c) V_{x} < 10v ; V_{y} < 10v

d) V_{x} > 10v ; V_{y} < 10v

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_{ref}is internally set to 10v. As long as V

_{x}< V

_{ref}and V

_{y}< V

_{ref}, the output of multiplier will not saturate.

## Linear Integrated MCQ Set 5

1. The major source of interference with the desired signal in electronic system is called

a) Error signal

b) Interference signal

c) Noise signal

d) Faulty signal

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2. Identify the external noise sources

a) Switching of rotating machinery

b) Control circuits

c) Ignition system

d) All of the mentioned

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3. Which among the following is not a source of internal noise?

a) AC random voltages generated within conductors

b) Lightning

c) Switching of circuits

d) None of the mentioned

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4. The type of noise phenomena that increases with increase in temperature is

s) None of the mentioned

b) 1/f noise

c) Schottky noise

d) Thermal noise

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5. The factors that determine the amount of noise induced is

a) Type of coupling between two circuits

b) Rate of change of current per unit time

c) Speed of operation of circuit

d) All of the mentioned

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6. Which type of noise is produced when the op-amp has wider bandwidth?

a) 1/f noise

b) Schottky noise

c) Thermal noise

d) Radiant noise

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7. Mention a scheme to reduce the effect of electrical noise on ICs?

a) Isolating ICs on different boards

b) Add a filter near ICs

c) Physical shielding of ICs

d) Use of compensating networks near ICs

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8. Internal noise generation can be reduced by keeping

a) None of the mentioned

b) Input lead length short

c) Both input and output lead length short

d) Output lead length short

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9. How to choose an IC for a high electrical noise environment?

a) Low degree of noise immunity

b) High degree of noise immunity

c) Low degree of noise reduction

d) High degree of noise reduction

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10. Which among the following has best immunity to induced noise?

a) Non-inverting amplifier

b) Inverting amplifier

c) Differential amplifier

d) Voltage follower

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11. Find the output voltage for differential amplifier, Where V_{in}->Induced input noise.

a) V_{O}= -[(R_{F}/R_{1})×V_{d}]+V_{no}

b) V_{O}= -(R_{F}/R_{1})×(V_{d}/V_{no})

c) V_{O}= -[(R_{F}/R_{1})×V_{d}]-V_{no}

d) V_{O}= -[(R_{F}/R_{1})×V_{d}]×V_{no}

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_{o}=-[(R

_{F}/R

_{1})×V

_{d}]+V

_{no}Where V

_{no}–> Output noise.