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Linear Integrated MCQ Set 1

1. Why differential amplifiers are preferred for instrumentation and industrial applications?
a) Input resistance is low
b) Produce amplified output
c) Amplify individual input voltage
d) Reject common mode voltage

View Answer

Answer: d [Reason:] Differential amplifiers are preferred in these applications because they are better able to reject common-mode voltage than single input circuits and present balanced input impedance.

2. Which of the following is a combination of inverting and non-inverting amplifier?
a) Differential amplifier with one op-amp
b) Differential amplifier with two op-amps
c) Differential amplifier with three op-amps
d) Differential amplifier with four op-amps

View Answer

Answer: a [Reason:] In differential amplifier with one op-amp both the inputs are connected to separate voltage source. So, if any one of the source is reduced to zero, differential amplifier acts as an inverting or non-inverting amplifier.

3. What will be the output voltage when Vx =0v?
(Where Vx –> inverting input terminal of differential amplifier with one op-amp)
a) Vo = -(1+R F/R1)*V1
b) Vo = -(1- R F/ R1)*V1
c) Vo = (1+ R F/ R1)*V1
d) Vo = (R F/ R1)*V1

View Answer

Answer: c [Reason:] When Vx =0v, the configuration is a non-inverting amplifier.

4. Compute the output voltage from the following circuit diagram?
linear-integrated-circuit-mcqs-differential-amplifier-multiple-op-amp-1-q4
a) -17v
b) -27v
c) -39v
d) -15v

View Answer

Answer: b [Reason:] Since VB=0, the configuration becomes as an inverting amplifier. Hence, the output due to VA is Vo = -(RF/R1)*VA = -(15kΩ/1.5kΩ)*2.7v = -10*2.7 = -27v.

5. Compute the output voltage if the input voltage is reduced to zero in differential amplifier with one op-amp?
a) Inverted Voltage
b) Same as the input voltage
c) Amplified inverted voltage
d) Cannot be determined

View Answer

Answer: d [Reason:] It is not mentioned clearly whether inverting input or non-inverting input is reduced to zero. Therefore, the output cannot be determined.

6. The difference between the input and output voltage are -1v and 17v. Calculate the closed loop voltage gain of differential amplifier with one op-amp?
a) -51
b) 34
c) -17
d) 14

View Answer

Answer: c [Reason:] Voltage gain of differential amplifier with one op-amp, AD=Output voltage / Difference of input voltage => AD = 17v/-1v = -17v.

7. For the differential amplifier given below, determine the Vx and RF value. Assume that the circuit is initially nulled.
linear-integrated-circuit-mcqs-differential-amplifier-multiple-op-amp-1-q7
a) Vx = -8v, RF = 9.9kΩ
b) Vx = 8v, RF = 9.9kΩ
c) Vx = -8v, RF = -9.9kΩ
d) Vx = 8v, RF = -9.9kΩ

View Answer

Answer: d [Reason:] The closed loop voltage gain, AD = -(RF/R1) => RF = -3*3.3kΩ = -9.9kΩ The net output is given is VO=-(RF /R1)*(Vx-Vy) => Vx= Vy– Vo (-R1 /RF) => Vx = 6+6(3.3kΩ/9.9kΩ) = 6+2 = 8v.

8. The gain of differential amplifier with one op-amp is same as that of
a) The inverting amplifier
b) The non-inverting amplifier
c) Both inverting and non-inverting amplifier
d) None of the mentioned

View Answer

Answer: a [Reason:] The gain of differential amplifier is given as AD= -(RF /R1), which is equivalent to the output voltage obtained from the inverting amplifier.

9. Find the value of input resistance for differential amplifier with one op-amp. If R1 = R2=100Ω and RF = R3 =5kΩ.
a) RIFx = 110Ω; RIFy = 6.7kΩ
b) RIFx = 100Ω; RIFy = 5.1kΩ
c) RIFx = 150Ω; RIFy = 7.2kΩ
d) RIFx = 190Ω; RIFy = 9.0kΩ

View Answer

Answer: b [Reason:] The input resistance of inverting amplifier is RIFx = (R1) and the input resistance of non-inverting amplifier is RIFy = (R2+ R3) => ∴ RIFx = 100Ω and => RIFy =100+5kΩ =5.1kΩ.

10. What is the net output voltage for differential amplifier with one op-amp
a) Vo = -(RF /R1)*Vx
b) Vo = -(RF /R1)*(Vx -Vy)
c) Vo = (1+RF /R1)*(Vx -Vy)
d) None of the mentioned

View Answer

Answer: b [Reason:] The net output voltage for differential amplifier with one op-amp is given as Vo= -(RF /R1)*(Vx-Vy).

Linear Integrated MCQ Set 2

1. Differentiation amplifier produces
a) Output waveform as integration of input waveform
b) Input waveform as integration of output waveform
c) Output waveform as derivative of input waveform
d) Input waveform as derivative of output waveform

View Answer

Answer: c [Reason:] Differentiation amplifier or differentiator is a circuit that performs mathematical operation of differentiation and produce output waveform as a derivative of input waveform.

2. Find out the differentiator circuit from the given circuits?
linear-integrated-circuit-mcqs-differentiator-q2

View Answer

Answer: a [Reason:] The differentiator is constructed from basic inverting amplifier by replacing the input resistor R1 by replacing a capacitor C1.

3. Determine the output voltage of the differentiator?
a) VO = RF×C1×[dVin/dt].
b) VO = -RF×C1×[dVin/dt].
c) VO = RF×CF×[dVin/dt].
d) None of the mentioned

View Answer

Answer: b [Reason:] The output voltage is equal to the RF×C1 times the negative instantaneous rate of change of the input voltage Vin with time.

4. which factor makes the differentiator circuit unstable?
a) Output impedance
b) Input voltage
c) Noise
d) Gain

View Answer

Answer: d [Reason:] The gain of the differentiator circuit (RF / XC1) increases with increase in frequency at a rate of 20dB/decade. This makes the circuit unstable.

5. The increase in the input frequency of the differentiation amplifier to input impedance creates
a) Component noise
b) External noise
c) Low frequency noise
d) High frequency noise

View Answer

Answer: d [Reason:] The input impedance of the amplifier decreases with increase in frequency and make the circuit susceptible to high frequency noise such that noise can completely over ride differential output.

6. Calculate the gain limiting frequency for the circuit
linear-integrated-circuit-mcqs-differentiator-q6
a) 15.64Hz
b) 23.356Hz
c) 33.89Hz
d) None of the mentioned

View Answer

Answer: c [Reason:] The gain limiting frequency, fb= 1/(2π×R1×C1). fb= 1/(2π×10kΩ×0.47µF)= 1/(2.9516×10-2) = 33.89Hz.

7. The stability and high frequency noise problem are corrected by
a) Adding feedback capacitor
b) Feedback capacitor and internal resistor
c) Feedback capacitor and feedback resistor
d) Internal capacitor and internal capacitor

View Answer

Answer: b [Reason:] The stability and high frequency noise problem are corrected by addition of two components to the differentiator: 1. Internal resistor in series with internal capacitor and 2. Feedback capacitor shunts with feedback resistor.

8. Select the order in which the frequency should be maintained to enhance the stability of differentiator? Where fa -> Frequency at which gain =0 ; fb -> Gain limit frequency ; fc -> Unity gain bandwidth.
a) fa < fb < fc
b) fa > fb > fc
c) fb < fc > fa
d) fb < fc < fa

View Answer

Answer: a [Reason:] The value of internal resistor and capacitor and feedback resistor and capacitor of the differentiator values should be selected such that fa < fb < fc to make the circuit more stable.

9. Which application use differentiator circuit?
a) None of the mentioned
b) FM modulators
c) Wave generators
d) Frequency Shift keying

View Answer

Answer: b [Reason:] The differentiators are used in FM modulator as a rate of change detector.

10. A sine wave of 1vpeak at 1000Hz is applied to a differentiator with the following specification: RF =1kΩ and C1=0.33µF, find the output waveform?
linear-integrated-circuit-mcqs-differentiator-q10

View Answer

Answer: a [Reason:] Given, Vin = Vp×sinωt = sin(2π×1000)t The output of differentiator Vo = -RF×C1×(dVin/dt) =(1kΩ)×(0.33µF)×d[sin2π×1000t]/dt = -3.3×10-4×2π×1000 ×[cos2π(1000)t] =-2.07×[cos2π(1000)t].

11. Choose the value of RF and C for a 5kHz input signal to obtain good differentiation.
a) RF = 1.6×103Ω, C1 = 33×10-6F
b) RF = 1.6×103Ω, C1 = 0.47×10-6F
c) RF = 1.6×103Ω, C1 = 47×10-6F
d) RF = 1.6×103 Ω, C1 = 10×10-6F

View Answer

Answer: b [Reason:] For a good differentiation, the time period of the input signal must be larger than or equal to RF C1 i.e. T ≥ RF×C1 Given f=5kHz , T=1/f = 1/5kHz = 2×10-4 –> Equ(1) RF×C1 = 0.4µF×1.6kΩ =7.52×10-4 –> Equ(2) Hence Equ(1) ≥ Equ(2).

12. Determine the transfer function for the practical differentiator
linear-integrated-circuit-mcqs-differentiator-q12
a) Vo(s) /V1(s) = -S×RF×C1/(1+R1×C1)2
b) Vo(s) /V1(s) = -S×RF×C1/(1+RF×C1)2
c) Vo(s) /V1(s) = -S×RF×C1/(1+R1×CF)2
d) None of the mentioned

View Answer

Answer: a [Reason:] The transfer function for the circuit, Vo(s) /V1(s) =-S×RF×C1/{[1+(RF CF)]×[1+(S×R1×C1)]}. In a practical differentiator, RFCF = R1C1 => Vo(s) /V1(s) = -SRF×C1/(1+SRF×CF)2 or Vo(s) /V1’(s) = -S×RF×C1/(1+R1×C1)2.

Linear Integrated MCQ Set 3

1. Which factor affects the power supply voltages in amplifier?
a) Poor regulation and filtering
b) Resistive network connected to amplifier
c) Change in temperature
d) All of the mentioned

View Answer

Answer: a [Reason:] A poorly regulated power supply give different values depending on the size & type of load connected it and a poorly filtered power supply has a ripple voltage riding on some specific dc level.

2. Change in the input bias current does not affect?
a) Input offset voltage
b) Output offset voltage
c) Input offset current
d) Output offset current

View Answer

Answer: c [Reason:] Even though the input bias currents change due to the change in supply voltages, the input offset current remain relatively constant because, it is the absolute value of the difference between two input bias currents.

3. A supply voltage rejection ratio of 15µv/v is given for an op-amp. Find its equivalent value in decibels
a) 74db
b) 77dB
c) 76.48dB
d) 76dB

View Answer

Answer: c [Reason:] Supply voltage rejection ratio, SVRR in dB= 20log(1/SVRR) =20log[1/(△Vio/△V)] = 20log(1/150µV/V) =20log(106/150) =20log(6666.67)= 76.48dB.

4. When does the op-amp perform better?
a) Low value of SVRR in µV/V
b) High value if SVRR in µV/V
c) Low value of SVRR in dB
d) High value of SVRR in dB

View Answer

Answer: a [Reason:] The total value of SVRR in µV/V should be zero. The lower the value of SVRR in µV/V, the better will be the op-amp performance.

5. Write the equation for change in the output offset voltage?
a) △Voo = [-RF/R1)]× [△Vio/△V] ×△V
b) △Voo = [1+(RF/R1)]× [△Vio/△V] ×△V
c) △Voo = [1+(RF/R1)]× [△Vio/△V].
d) None of the mentioned

View Answer

Answer: b [Reason:] The change in the input offset voltage is given as △Voo =[1+(RF/R1)]× [△Vio/△V] × △V Where, △V = Change in supply voltage +Vcc & -Vee, △Vio/△V = Supply voltage rejection ratio (µV/V) and [1+(RF/R1)] = Gain of the differential amplifier.

6. A LM307 amplifier has SVRR of 92dB, express it in terms of microvolts per volts?
a) 65µV/V
b) 37.98µV/V
c) 25.12µV/V
d) 101.4µV/V

View Answer

Answer: c [Reason:] 20log(1/SVRR)=92dB => log(1/SVRR) = 92/20 => 1/SVRR= 104.6 => SVRR = 1/104.6 =25.12µV/V.

7. Which value remain the same regardless of whether it is computed from the change in low dc supply or change in +Vcc or -Vee ?
a) △V
b) △Vio
c) △Voo
d) None of the mentioned

View Answer

Answer: d [Reason:] △V value is the same regardless of whether it is computed from the change in low dc supply or change in +Vcc or -Vee . For example, suppose that -Vee remains constant at -10v then the +Vcc has to vary from 8 to 12v as a result of change in low dc voltage. This means that the change in △V in supply voltage +Vcc is 2v in either direction from 10v.

8. Consider LM307 is initially nulled. Suppose, the op-amp has poor filter, 20mVrms then ac ripple is measured across the terminals. If Vin=0v, determine the change in output offset voltage caused by the change in supply voltage?
linear-integrated-circuit-mcqs-effect-variation-power-supplu-voltage-offset-voltage-q8
a) 81µVrms
b) 8.1µVrms
c) 0.81µVrms
d) 810µVrms

View Answer

Answer: b [Reason:] The SVRR =15.85µV/V for LM307 because of poor filtering and △V=10mVrms . The change in output offset voltage, △Voo =[1+(RF/R1)]× [△Vio/△V] ×△V = [1+(950kΩ/1kΩ)] × (15.85µV/V) × 910mv= 8.1µVrms.

Linear Integrated MCQ Set 4

1. JFET is similar to that of fabrication of
a) Diode fabrication
b) BJT fabrication
c) FET fabrication
d) None of the mentioned

View Answer

Answer: b [Reason:] The basic processes used are as same as BJT fabrication. Epitaxial layer (collector of BJT) is used as the n-channel of JFET. The p+ is formed in n-channel by process of diffusion and n+ region formed under drain and source provide good ohmic contact.

2. What are the types of MOSFET devices available?
a) P-type enhancement type MOSFET
b) N-type enhancement type MOSFET
c) Depletion type MOSFET
d) All of the mentioned

View Answer

Answer: d [Reason:] MOSFET are available as Enhancement type and depletion type MOSFET. These are further classified into n-type and p-type device.

3. Which insulating layer used in Fabrication of MOSFET?
a) Aluminium oxide
b) Silicon Nitride
c) Silicon dioxide
d) None of the mentioned

View Answer

Answer: c [Reason:] Silicon dioxide is used as insulating layer in MOSFET Fabrication. It gives an extremely high input resistance in the order of 1010 to 1015 Ω for MOSFET.

4. Which of the following plays an important role in improving device performance of MOSFET?
a) Dielectric constant
b) Threshold voltage
c) Power supply voltage
d) Gate to drain voltage

View Answer

Answer: b [Reason:] In MOSFET, the threshold voltage is typically 3 to 6v. This large voltage is not compatible with 5v supply used in digital IC. So, to improve device performance, magnitude of threshold voltage should be reduced.

5. A technique used to reduce the magnitude of threshold voltage of MOSFET?
a) Use of complementary MOSFET
b) Use of Silicon nitride
c) Using thin film technology
d) None of the mentioned

View Answer

Answer: b [Reason:] Silicon nitride is sandwiched between two SiO2 layer and provide necessary barrier .The dielectric constant of Si3N4 is 7.5, whereas that of SiO2 is 4. This increase in overall dielectric constant reduces threshold voltage.

6. Find the sequence of steps involved in fabrication of poly silicon gate MOSFET?
Step 1: Entire wafer surface of a Si3N4is coated and it is etched away with the help of mask to include source, gate and drain.
Step 2: The contact areas are defined using photolithographic process
Step3: Selective etching of Si3N4 and thin oxide growth
Step 4: Deposition of poly silicon gate
Step 5: thick oxide growth called field oxide and P implantation
Step 6: Metallization and interconnection between substrate and source
a) 1->5->3->4->2->6
b) 1->3->4->2->5->6
c) 1->5->4->3->2->6
d) 1->4->2->5->3->6

View Answer

Answer: a [Reason:] The mentioned steps are the sequence of steps involved in the fabrication of poly silicon gate MOSFET.

7. What is used to higher the speed of operation in MOSFET fabrication?
a) Ceramic gate
b) Silicon dioxide
c) Silicon nitride
d) Poly silicon gate

View Answer

Answer: d [Reason:] In conventional metal gate, small overlap capacitance is present, which lowers the speed of operation. Due to self aligning property of poly silicon gate, it eliminates this capacitance.

8. Why MOSFET is preferred over BJT in IC components?
a) MOSFET has low packing density
b) MOSFET has medium packing density
c) MOSFET has high packing density
d) MOSFET has no packing density

View Answer

Answer: c [Reason:] No isolation island is required in MOSFET structure because, the drain of an n-mos device is held positive with respect to source. This cutoff the drain to substrate diode and the source to substrate diode formed due to p+ region. In BJT, the isolation diffusion occupies extremely large percentage of chip area.

9. Which of the following statement is true?
a) Fabrication of p-mos transistor require few additional steps compared to n-mos transistor
b) Fabrication of n-mos transistor require few additional steps compared to p-mos transistor
c) Fabrication on n-mos is same as that of p-mos transistor
d) Fabrication on n-mos is different from that of p-mos transistor

View Answer

Answer: a [Reason:] There are two additional steps required in the formation of p-mos transistor compared to n-mos transistor. Such as, the formation of n-region and ion implantation of p-type source and drain regions.

10. Find complementary MOSFET from the given circuit diagram?
a) linear-integrated-circuit-mcqs-fabrication-fet-q10a
b) linear-integrated-circuit-mcqs-fabrication-fet-q10b
c) linear-integrated-circuit-mcqs-fabrication-fet-q10c
d) linear-integrated-circuit-mcqs-fabrication-fet-q10d

View Answer

Answer: b [Reason:] Complementary MOSFET is combination of n-mos and p-mos enhancement device such that the source of p-mos is connected to Vdd and source of n-mos is connected to ground.

Linear Integrated MCQ Set 5

1. Find the voltage across the capacitor in the given circuit
linear-integrated-circuit-mcqs-first-order-low-pass-butterworth-filter-q1
a) VO= Vin/(1+0.0314jf)
b) VO= Vin×(1+0.0314jf)
c) VO= Vin+0.0314jf/(1+jf)
d) None of the mentioned

View Answer

Answer: a [Reason:] The voltage across the capacitor, VO= Vin/(1+j2πfRC) => VO= Vin/(1+j2π×5k×1µF×f) => VO= Vin/(1+0.0314jf).

2. Find the complex equation for the gain of the first order low pass butterworth filter as a function of frequency.
a) AF/[1+j(f/fH)].
b) AF/√ [1+j(f/fH)2].
c) AF×[1+j(f/fH)].
d) None of the mentioned

View Answer

Answer: a [Reason:] Gain of the filter, as a function of frequency is given as VO/ Vin=A F/(1+j(f/fH)).

3. Compute the pass band gain and high cut-off frequency for the first order high pass filter.
linear-integrated-circuit-mcqs-first-order-low-pass-butterworth-filter-q3
a) AF=11, fH=796.18Hz
b) AF=10, fH=796.18Hz
c) AF=2, fH=796.18Hz
d) AF=3, fH=796.18Hz

View Answer

Answer: c [Reason:] The pass band gain of the filter, AF =1+(RF/R1) =>AF=1+(10kΩ/10kΩ)=2. The high cut-off frequency of the filter, fH=1/2πRC =1/(2π×20kΩ×0.01µF) =1/1.256×10-3 =796.18Hz.

4. Match the gain of the filter with the frequencies in the low pass filter

FrequencyGain of the filter
1. f < fHi. VO/Vin ≅ AF/√2
2. f=fHii. VO/Vin ≤ AF
3. f>fHiii. VO/Vin ≅ AF

a)1-i,2-ii,3-iii
b)1-ii,2-iii,3-i
c)1-iii,2-ii,3-i
d)1-iii,2-i,3-ii

View Answer

Answer: d [Reason:] The mentioned answer can be obtained, if the value of frequencies are substituted in the gain magnitude equation |(Vo/Vin)|=AF/√(1+(f/fH)2).

5. Determine the gain of the first order low pass filter if the phase angle is 59.77o and the pass band gain is 7.
a) 3.5
b) 7
c) 12
d) 1.71

View Answer

Answer: a [Reason:] Given the phase angle, φ =-tan-1(f/fH) => f/fH=- φtan(φ) = -tan(59.77o) => f/fH= -1.716. Substituting the above value in gain of the filter, |(VO/Vin)| = AF/√ (1+(f/fH)2) =7/√[1+(-1.716)2)] =7/1.986 =>|(VO/Vin)|=3.5.

6. In a low pass butterworth filter, the condition at which f=fH is called
a) Cut-off frequency
b) Break frequency
c) Corner frequency
d) All of the mentioned

View Answer

Answer: d [Reason:] The frequency, f=fH is called cut-off frequency, because the gain of the filter at this frequency is down by 3dB from 0Hz. Cut-off frequency is also called as break frequency, corner frequency or 3dB frequency.

7. Find the High cut-off frequency if the pass band gain of a filter is 10.
a) 70.7Hz
b) 7.07kHz
c) 7.07Hz
d) 707Hz

View Answer

Answer: c [Reason:] High cut-off frequency of a filter, fH=0.707×AF =0.707×10 =>fH=7.07Hz.

8. To change the high cutoff frequency of a filter. It is multiplied by R or C by a ratio of original cut-off frequency known as
a) Gain scaling
b) Frequency scaling
c) Magnitude scaling
d) Phase scaling

View Answer

Answer: b [Reason:] Once a filter is designed, it may sometimes be a need to change it’s cut-off frequency. The procedure used to convert an original cut-off frequency fH to a new cut-off frequency is called frequency scaling.

9. Using the frequency scaling technique, convert 10kHz cut-off frequency of the low pass filter to a cutoff frequency of 16kHz.(Take C=0.01µF and R=15.9kΩ)
a) 6.25kΩ
b) 9.94kΩ
c) 16kΩ
d )1.59kΩ

View Answer

Answer: b [Reason:] To change a cut-off frequency from 10kHz to 16kHz,multiply 15.9kΩ resistor. [Original cut-off frequency/New cut-off frequency] =10kHz/16kHz =0.625. ∴ R =0.625×15.9kΩ =9.94kΩ. However 9.94kΩ is not a standard value. So, a potentiometer of 10kΩ is taken and adjusted to 9.94kΩ.

10. Find the difference in gain magnitude for a filter ,if it is the response obtained for frequencies f1=200Hz and f2=3kHz. Specification: AF=2 and fH=1kHz.
a) 4.28 dB
b) 5.85 dB
c) 1.56 dB
d) None of the mentioned

View Answer

Answer: c [Reason:] When f1=200Hz, VO(1)/Vin =AF/√ [1+(f/fH)2] =2/√ [1+(200/1kHz) 2] =2/1.0198. => VO(1)/Vin =1.96 =>20log|(VO/Vin)|=5.85dB. When f=700Hz, VO(2)/Vin= 2/√ [1+(700/1kHz) 2] =2/1.22=1.638. => VO(2)/Vin =20log|(VO/Vin|=20log(1.638) = 4.28. Therefore, the difference in the gain magnitude is given as VO(1)/Vin-VO(2)/Vin =5.85-4.28 =1.56 dB.

11. Design a low pass filter at a cut-off frequency 1.6Hz with a pass band gain of 2.
linear-integrated-circuit-mcqs-first-order-low-pass-butterworth-filter-q11

View Answer

Answer: a [Reason:] From the answer, it is clear that all the C values are the same . Therefore, c= 0.01µF Given, fH = 1kHz, => R= 1/(2πCfm) = 1/2π×0.01µF×1kHz R= 9.9kΩ ≅ 10kΩ. Since the pass band gain is 2. => 2=1+ (RF/R1). Therefore, RF and R1 must be equal.

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