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## Linear Integrated MCQ Set 1

1. When does the op-amp said to operate in common-mode configuration?
a) When the input voltage are equal
b) When input voltage is equal to the output voltage
c) When same voltage is applied to both input terminal of an op-amp
d) When different voltage is applied to both input and terminal of an op-amp

Answer: c [Reason:] When the same input voltage is applied to both input terminal of an op-amp, the op-amp is said to be operating in an common mode configuration.

2. Common mode voltage gain of an op-amp is generally
a) >1
b) =1
c) <1
d) None of the mentioned

Answer: c [Reason:] The amplitude of common mode output voltage is very small and often insignificant compared to common-mode input voltage. Therefore, the common mode voltage gain is generally much smaller than 1.

3. Find the op-amp common mode configuration

Answer: b [Reason:] The mentioned circuit has the applied voltage common to both the inputs.

4. Calculate the common-mode voltage gain for the circuit

a) 30*10-3
b) 17*10-3
c) 51*10-3
d) 2.4*10-3

Answer: d [Reason:] The common mode voltage gain is given as ACM = VOCM/VCM = 12µv/5kΩ =2.4*10-3.

5. Define the common-mode rejection ratio (CMRR) of op-amp?
c) CMRR=VOCM/ACM

Answer: a [Reason:] CMRR is defined as the ratio of the differential gain to the common mode gain, that is CMRR=AD/ACM.

6. Determine the common mode output voltage .Given CMRR=65db

a) 2.81mV
b) 281.17mV
c) 28.11mV
d) 0.281mV

Answer: b [Reason:] AD= RF/ R1 = 30kΩ/3kΩ = 10. WKT, CMRR =( AD* VCM)/ VOCM= 20logCMRR = 65db = 10(65/20) = 1778.28 => Common mode output voltage, VOCM= ( AD* VCM)/CMRR = (10*5mV)/1778.28= 281.17mV.

7. Find the correct equation for common-mode rejection ratio
b) CMRR = 20log(Vio/ VCM)
c) CMRR = (AD* VCM)/ VOCM
d) All of the mentioned

Answer: d [Reason:] Generally, the CMRR value is very large and usually specified in decibels (db). Also, the CMRR value can establish relationship with common mode output voltage.

8. When an op-amp exhibits poor common mode rejection?
a) Small common mode output voltage
b) Large common mode output voltage
c) Negligible common mode output voltage
d) None of the mentioned

Answer: b [Reason:] A large common mode output voltage for a given common mode input voltage indicates a large degree of imbalance between the two input terminals or poor CMRR.

9. Higher value of common mode rejection ratio can be reached
a) By reducing the common mode voltage
b) By decreasing the differential gain
c) By reducing the common mode input voltage
d) All of the mentioned

Answer: d [Reason:] CMRR =(AD* VCM)/ VOCM, this equation indicates that the higher the value of CMRR, the smaller will be the amplitude of the output common-mode voltage.

## Linear Integrated MCQ Set 2

1. Depending on the value of input and reference voltage a comparator can be named as
a) Voltage follower
b) Digital to analog converter
c) Schmitt trigger
d) Voltage level detector

Answer: d [Reason:] A comparator is some time called as voltage level detector because, for a desired value of reference voltage, the voltage level of the input can be detected.

2. Why clamp diodes are used in comparator?
a) To reduce output offset voltage
b) To increase gain of op-amp
c) To reduce input offset current
d) To protect op-amp from damage

Answer: d [Reason:] The diodes protect the op-amp from damage due to excessive input voltage. Because of these diodes the difference input voltage of the op-amp is clamped to 0.7v or -0.7 v, hence these diodes are clamp diodes.

3. Find the non-inverting comparator

Answer: a [Reason:] In a non-inverting comparator a fixed reference voltage Vref of 1v is applied to positive inverting input terminal and the other time vary in signal voltage is applied to non-inverting input terminal of the op-amp.

4. How the op-amp comparator should be choosen to get higher speed of operation?
a) Large gain
b) High slew rate
c) Wider bandwidth
d) None of the mentioned

Answer: c [Reason:] The bandwidth of the op-amp comparator must be wider so that the output of comparator can switch rapidly between saturation levels. Also, the op-amp responds instantly to any change in condition at the input.

5. How to obtain high rate of accuracy in comparator?
a) Input offset
b) High voltage gain
c) High CMRR
d) All of the mentioned

Answer: d [Reason:] High voltage gain causes comparator output voltage to switch between saturation levels. High CMRR rejects noise at input terminal and input offset (voltage & current) help to keep changes in temperature variation very slight.

6. How to keep the output voltage swing of the op-amp comparator within specific limits?
a) External resistors or diodes are used
b) External zeners or diodes are used
c) External capacitors or diodes are used
d) External inductors or diodes are used

Answer: b [Reason:] To keep the output voltage swing within specific limit, op-amps are used with external wired components such as zeners or diodes. In the resulting circuit, the outputs are limited to predetermined values.

7. Zero crossing detectors is also called as
a) Square to sine wave generator
b) Sine to square wave generator
c) Sine to triangular wave generator
d) All of the mentioned

Answer: b [Reason:] In zero crossing detectors, the output waveform is always a square wave for the applied sinusoidal input signal.

8. What is the drawback in zero crossing detectors?
a) Low frequency signal and noise at output terminal
b) High frequency signal and noise at input terminal
c) Low frequency signal and noise at input terminal
d) High frequency signal and noise at output terminal

Answer: c [Reason:] Due to low frequency signal, the output voltage may not switch quickly from one saturation voltage to other. The presence of noise can fluctuate the output between two saturation voltages.

9. State a method to overcome the drawback of zero crossing detectors?
a) Increasing input voltage
b) Use of positive feedback
c) Connect a compensating network
d) None of the mentioned

Answer: b [Reason:] The drawback of zero crossing detectors can be in cured with the use of regenerative or positive feedback that causes the output to change faster and eliminate any false output transition due to noise signals at the input.

10. Name the comparator that helps to find unknown input.
a) Time marker generator
b) Zero crossing detectors
c) Phase meter
d) Window detector

Answer: d [Reason:] Sometimes it is necessary to find the instant at which an unknown input is between two threshold levels. This can be achieved by a circuit called window detector.

11. Find the instance at which the input can be fed to the op-amp in a three level comparator with LED indicator.

a) When Green LED glow
b) When Yellow LED glow
c) When Red LED glow
d) All of the mentioned

Answer: a [Reason:] The input can be fed to the op-amp when the green LED glows, which is considered to be safe input that is when the input voltage is between 3v and 6v.

12. Find the output voltage at the point V2 from the given circuit.

Answer: b [Reason:] The output of the zero crossing detector is differentiated by an RC circuit (RC>>1). So, the voltage at V2 is a series of positive and negative pulses.

13. Mention the application areas of time marker generator can be used
a) Monoshots
b) SCR
c) Sweep voltage of CRT
d) All of the mentioned

Answer: d [Reason:] A diode connected at the output of time marker generator circuit converts the sinusoidal signal into a train of positive pulses. So, these pulses are used in triggering the monoshot, SCR, sweep voltage of CRT, etc.

14. Which among the following is used to increase phase angle between different voltages?
a) Phase detector
b) Window detector
c) Zero crossing detector
d) None of the mentioned

Answer: a [Reason:] Phase angle between different voltages can be measured using phase detector circuit. The corresponding voltage to be measured is converted into spikes and the time interval between the pulse spikes is measured, which is proportional to the phase difference.

15. For the comparator shown below, determine the transfer curves if an ideal op-amp with VZ1= VZ2=9v.

Answer: a [Reason:] The open loop voltage gain of an ideal op-amp AOl=∞, even a small positive or negative voltage at the input drives the output to ±Vsat. So, the output voltage VO = ±( V2 +Vsat) Therefore, VO = ±(VZ+VSat) =± (9+0.7) = ±9.7 v.

## Linear Integrated MCQ Set 3

1. The output current equation for MC1408 digital to analog converter would be
a) Io= -(Vref/R1)×[(D7/2)+(D6/4)+(D5/8)+(D4/16)+(D3/32)+(D2/64)+(D1/128)+(D0/256)].
b) Io= (Vref/2R1)×[(D7/2)+(D6/4)+(D5/8)+(D4/16)+(D3/32)+(D2/64)+(D1/128)+(D0/256)].
c) Io= (Vref/R1)×[(D7/2)+(D6/4)+(D5/8)+(D4/16)+(D3/32)+(D2/64)+(D1/128)+(D0/256)].
d) Io= -(Vref/2R1)×[(D7/2)+(D6/4)+(D5/8)+(D4/16)+(D3/32)+(D2/64)+(D1/128)+(D0/256)].

Answer: c [Reason:] MC1408 is a combination of a DAC and current to voltage converter. If the binary signal is input to MC1408 DAC then the output current would be, Io= (Vref/R1)×[ (D7/2)+(D6/4)+(D5/8)+(D4/16)+(D3/32)+(D2/64)+(D1/128)+(D0/256)].

2. Determine the maximum value of output current of the DAC in MC1408?
a) 0.773×(Vref/R1)
b) 0.448×(Vref/R1)
c) 0.996×(Vref/R1)
d) 0.224×(Vref/R1)

Answer: c [Reason:] The output current of DAC is the maximum when all the inputs are logic 1. Therefore, Io= (Vref/R1)×(1/2+1/4+1/8+1/16+1/32+1/64+1/128/+1/256)=(0.996)×(Vref/R1).

3. Determine the range or the output voltage?

a) 0 – 2.51v
b) 0 – 2.22v
c) 0 – 3.74v
d) 0 – 4.93v

Answer: d [Reason:] When all binary input D0 through D7 are logic 0, the current Io =0. ∴ The minimum value of Vo =0v. When all the inputs are at logic 1, Io = (Vref/R1) × (1/2+1/4+1/8+1/16+1/32+1/64+1/128/+1/256) = (3/2kΩ) × (0.996) =1.494mA. Hence, the maximum value of output voltage is Vo= Io×RF = 1.494×3.3kΩ =4.93v. Thus, the output voltage range is from 0 to 4.93v.

4. Calculate the change in the output voltage if the photocell is exposed to light of 0.61lux from a dark condition. Specification: Assume that the op-amp is initially nulled, Minimum dark resistance = 100kΩ and resistance when illuminated (at 0.61lux) = 1.5kΩ.

a) Vo –> 23v to 50v
b) Vo –> 0v to 33.11v
c) Vo –> -1.653v to 8.987v
d) Vo –> -0.176v to -11.73v

Answer: d [Reason:] The resistance RT in darkness is 100kΩ. The minimum output voltage in darkness is Vo min = -(Vdc×RF)/ RT = -(3.2v×5.5kΩ)/100kΩ = -0.176v. When photocell is illuminated, its resistance RT =1.5kΩ. Therefore, the maximum output voltage is Vo max = -(Vdc×RF)/ RT = -(3.2v×5.5kΩ)/1.5kΩ =-11.73v. Thus, Vo varies from -0.176v to -11.73 as the photocell is exposed to light from a dark condition.

5. Which cell can be used instead of a photocell to obtain active transducer in photosensitive devices?
a) Photovoltaic cell
b) Photo diode
c) Photo sensor
d) All of the mentioned

Answer: a [Reason:] A photovoltaic cell is semiconductor junction device that convert radiation energy into electrical energy and hence it does not require external voltage.

6. If the input applied to DAC using current to voltage converter is 10110100, determine the reference voltage (Assume Io= 2mA and R1=1.2kΩ)
a) 53.1v
b) 3.41v
c) 9.21v
d) 67.34v

Answer: b [Reason:] Io=Vref/R1×[(D7/2)+(D6/4)+(D5/8)+(D4/16)+(D4/32)+(D4/64)] Vref =(Io×R1)/ (1/2+0+1/8+1/16+0+1/64+0+0)=(2mA×1.2kΩ)/0.703 . => Vref = 3.41v.

7. The current to voltage converter photosensitive device can be used as
a) Light intensity meter
c) Light deposition meter
d) None of the mentioned

Answer: a [Reason:] The photosensitive device can be used as a light intensity meter by connecting a meter at the output that is calibrated for light intensity.

8. For a full wave rectification, in a low voltage ac voltmeter, the meter current can be expressed as
a) Io = (1.9×Vin)/R1
b) Io = (3.9×Vin)/R1
c) Io = (0.9×Vin)/R1
d) Io = (2.9×Vin)/R1

Answer: c [Reason:] For full wave rectification, meter current is expressed as Io = 0.9xVin/R1.

## Linear Integrated MCQ Set 4

1. Find out the resolution of 8 bit DAC/ADC?
a) 562
b) 625
c) 256
d) 265

Answer: c [Reason:] The resolution is the value of LSB Resolution =2n, where n-> number of bits ∴ Resolution =28=256 possible output values.

2. Non-linearity in the output of converter is expressed in
a) None of the mentioned
b) Percentage of reference voltage
c) Percentage of resolution
d) Percentage of full scale voltage

Answer: d [Reason:] Non-linearity is the measure of deviation of actual output (ε) from the ideal straight line output (△). Therefore, it is expressed as percentage of full scale voltage (ε/△).

3. A binary input 000 is fed to a 3bit DAC/ADC. The resultant output is 101. Find the type of error?
a) Settling error
b) Gain error
c) Offset error
d) Linearity error

Answer: c [Reason:] Offset error implies that the output of the DAC is not zero when the binary inputs are all zero.

4. How many equal intervals are present in a 14-bit D-A converter?
a) 16383
b) 4095
c) 65535
d) 1023

Answer: a [Reason:] A 14-bit D-A converter has 2n-1 equal interval =214-1=16384-1=16383.

5. Resolution of a 6 bit DAC can be stated as
a) Resolution of 1 part in 63
b) 6-bit resolution
c) Resolution of 1.568% of full scale
d) All of the mentioned

Answer: d [Reason:] Resolution of 6 bit DAC =VFS% /(2n-1) =(VFS×100)/(26-1) = 1.588% of VFS and the number of interval is 26-1=63. => Thus, resolution of a 6 bit DAC can be stated as a resolution of 1 part in 63.

6. Find the resolution of a 10-bit AD converter for an input range of 10v?
a) 97.7mv
b) 9.77mv
c) 0.977mv
d) 977mv

Answer: b [Reason:] Resolution (in volts) VFS /(2n -1)= 10 /(210 -1) =10/1023 =9.77mv.

7. A good converter exhibits a linearity error
a) Less than or equal to (1/2)LSB
b) Greater than equal to (1/2)LSB
c) Greater than or equal to (1/2)LSB
d) None of the mentioned

Answer: d [Reason:] A good converter exhibits a linearity error of less than ±(1/2)LSB.

8. The maximum deviation between actual and ideal converter output after the removal of error is
a) Absolute accuracy
b) Relative accuracy
c) Relative /absolute accuracy
d) Linearity

Answer: b [Reason:] Relative accuracy is the maximum deviation after gain and offset error has been removed.

9. A monotonic DAC is one whose analog output increases for
a) Decreases in digital input
c) An increases in digital input

Answer: c [Reason:] In a DAC, the analog input is converted into digital output. So, a monotonic DAC increases its analog output with increase in its digital output. For example, if the output decreases when input code change from 001 to 010, it is said to be a non-monotonic DAC.

10. All the commercially available DAC are
a) Monotonic
b) Non-monotonic
c) Either monotonic or non-monotonic
d) None of the mentioned

Answer: a [Reason:] All the commercially available DACs are monotonic because the linearity error never exceeds ± (1/2) LSB at each output level.

11. The time taken for the output to settle within a specified band of its final value is referred as
a) Conversion time
b) Settling time
c) Take off time
d) All of the mentioned

Answer: b [Reason:] Settling time represents the time taken for the output to settle within a specified band ± (1/2) LSB of its final value following a code change at the input (usually a full scale change).

## Linear Integrated MCQ Set 5

1. An inverting amplifier that amplifies dc input level is called
a) DC and AC amplifier
b) AC amplifier
c) DC amplifier
d) None of the mentioned

Answer: c [Reason:] In a DC amplifier, the output signal changes it response to changes in its dc input level. A DC amplifier can be inverting, non-inverting or differential.

2. Find the DC differential amplifier with offset null circuitry?

Answer: c [Reason:] The mentioned circuit is the DC differential amplifier, since DC voltage is applied to the differential inputs of the amplifier.

3. Why DC amplifier uses offset null circuitry?
a) To reduce the distortion in output
b) To improve the accuracy of amplifier
c) To get large output gain
d) All of the mentioned

Answer: b [Reason:] A DC amplifier uses offset null circuitry to reduce the output offset voltage to zero, that is , to improve the accuracy of DC amplifier.

4. Why are coupling capacitor used in audio receiver system?
a) All of the mentioned
b) Thermal drift
c) Component tolerance
d) Variation in signal

Answer: a [Reason:] An audio receiver system consists of a number of stages because of thermal drift, components tolerance and variation, which introduces a dc level. To prevent the amplification of such dc level, the coupling capacitors are used.

5. Find the AC inverting amplifier from the circuits given below?

Answer: a [Reason:] AC amplifier consists of external offset voltage compensating network. Therefore, the external offset voltage is connected to the non-inverting input terminal of the amplifier.

6. Determine the bandwidth of the AC inverting amplifier for high cut-off frequency of 15 Hz?

a) 4.321Hz
b) 8.356Hz
c) 7.056Hz
d) 2.334Hz

Answer: b [Reason:] Input resistance RIF=R1=100Ω (for ideal inverting amplifier). => The source resistance RIN=RO=5kΩ. Therefore, Low frequency cut-off, fL=1/2πCi(RIF+RO) = 1/ [2π×4.7µF×(5kΩ+100Ω)] = 6.64Hz. and the bandwidth is calculated as, BW= fH-fL = 15Hz-6.64Hz = 8.356Hz.

7. When does the offset voltage compensating network must be used in inverting configuration?
a) When the input is AC voltage
b) When the input is DC voltage
c) When the input is either AC or DC voltage
d) None of the mentioned