Multiple choice question for engineering
1. PIN diode is a photosensitive diode because of _______
a) large current flow in p and n region
b) depletion layer increases giving a larger surface area
c) stronger covalent bonds
d) low carrier storage
2. During forward bias, the PIN diode acts as _______
a) a variable resistor
b) a variable capacitor
c) a switch
d) an LED
3. During reverse bias, the PIN diode acts as _______
a) Variable resistor
c) Variable capacitor
4. When the p and n regions are used for high resistivity, the depletion region at the respective places is called _________
a) Q and ϒ regions
b) ϒ and π regions
c) Q and π regions
d) π and ϒ regions
5. The applications for PIN diode are __________
a) Microwave switch
c) Voltage regulator
6. In high frequency model, the values of resistance ‘R’ and capacitance ‘C’ are _______
a) 0.1 to 10KΩ and 0.02 to 2pF respectively
b) 1 to 10KΩ and 0.02 to 2pF respectively
c) 10 to 100KΩ and 0.02 to 2pF respectively
d) 0.1 to 10KΩ and 2 to 20pF respectively
7. What happens in PIN diode for low frequency model?
a) reactance decreases
b) conductance increases
c) resistance increases
d) reactance increases
8. Which of the following is true about a PIN diode?
a) it’s photosensitive in reverse bias
b) it offers low resistance and low capacitance
c) it has a decreased reversed breakdown voltage
d) carrier storage is low
9. In the application of frequency models, the value of forward current is _____
a) IF = A(µPP + µNN)q
b) IF = A(µPN + µNP)q
c) IF = A(µPP – µNN)q
d) IF = A(µPN – µNP)q
10. The forward resistance for a PIN diode is given by ________
a) RF = W/σP
b) RF = W/σN
c) RF = WσP
d) RF = WσN
1. Diode acts as a short circuit when switched from forward to reverse bias for some time due to______
a) Accumulation of minority charge carriers when it’s in forward bias
b) Accumulation of majority charge carriers when it’s in forward bias
c) Accumulation of minority charge carriers when it’s in reverse bias
d) Accumulation of majority charge carrier when it’s in reverse bias
2. Reverse recovery time for a diode is?
a) Time taken to eliminate excess minority charge carriers
b) Sum of storage time (TS) and transition time (TT)
c) Time taken to eliminate excess majority charge carriers
d) Time elapsed to return to non conduction state
3. Switching speed of P+ junction depends on.
a) Mobility of minority carriers in P junction
b) Life time of minority carriers in P junction
c) Mobility of majority carriers in N junction
d) Life time of minority carriers in N junction
4. Time taken for a diode to reach 90% of its final value when switched from steady state is______
a) 2.3*time constant
b) 2.2*time constant
c) 1.5*time constant
d) equals the time constant
5. Which of the following are true?
1) In reverse bias, the diode undergoes stages of storage and transition times
2) Minority charge carriers accumulation makes the diode as a short circuit
3) Storage time is the sum of recovery and transition times
a) 1 only
b) 2 and 3
c) 3 only
d) 1 and 2 only
6. In a circuit below, the switch is at position 1 at t<0 and at position 2 when t=0. Assume diode has zero voltage drop and storage time. For 0<t<ts, the VR at 1k ohm resistor is given by_____
7. The switch is at position shown in the figure initially and steady state is from t=0 to t=to. The switch suddenly is thrown to the other position. The current flowing through the 10K resistor from t=0 is?
8. A PN junction diode with 100Ω resistor is forward biased such that 100A current flows. If voltage across this combination is instantaneously reversed to 10V at t=0, the reverse current that flows through diode at t=0 is?
9. The delay in switching between the ON and OFF states is due to _________
a) The time required to change amount of excess minority carriers stored in quasi-neutral regions
b) The time required to change amount of excess majority carriers stored in quasi-neutral regions
c) The conduction between storage time and recovery time
d) The exponential increase in carriers in N region
10. The delay time can be reduced by?
a) decreasing lifetime and increasing ratio of reverse to forward current
b) increasing lifetime and decreasing ratio of reverse to forward current
c) increasing lifetime and increasing ratio of reverse to forward current
d) decreasing lifetime and decreasing ratio of reverse to forward current
1. How many junction/s do a diode consist?
2. If the positive terminal of the battery is connected to the anode of the diode, then it is known as
a) Forward biased
b) Reverse biased
d) Schottky barrier
3. During reverse bias, a small current develops known as
a) Forward current
b) Reverse current
c) Reverse saturation current
d) Active current
4. If the voltage of the potential barrier is V0. A voltage V is applied to the input, at what moment will the barrier disappear?
a) V< V0
b) V= V0
c) V> V0
d) V<< V0
5. During the reverse biased of the diode, the back resistance decrease with the increase of the temperature. Is it true or false?
6. What is the maximum electric field when Vbi=2V , VR=5V and width of the semiconductor is 7cm?
7. When the diode is reverse biased with a voltage of 6V and Vbi=0.63V. Calculate the total potential.
8. It is possible to measure the voltage across the potential barrier through a voltmeter?
9. What will be the output of the following circuit? (Assume 0.7V drop across the diode)
10. Which of the following formula represents the correct formula for width of the depletion region?
1. The materials that are used in the construction of point contact diode are _________
b) SnTe or Bi2Te3
c) GaS or CdS
2. Which of the following are true?
1) point contact diode has a metal whisker to make pressure contact during its operation
2) it has high voltage rating
3) its V-I characteristics are constant
4) it has low breakdown voltage
a) 1 and 2
b) 3 only
c) 1 and 4
d) 2 only
3. In the forward bias condition, the resistance of point contact diode is_________
a) less than that of a general PN diode
b) greater than that of a general PN diode
c) equal to that of a general PN diode
d) varies exponentially than that of a general PN diode
4. The barrier layer capacitance of a point contact diode is_________
a) 0.1pF to 1pF
b) 5pF to 50pF
c) 0.2pF to 2pF
d) 0.008µF to 20µF
5. The cat whisker wire present in the contact diode is used for_________
a) for heat dissipation
b) for charge transfer between sections
c) maintaining the pressure between sections
d) preventing current flow
6. The semiconductor junctions those are present in a contact diode_________
a) beryllium-copper and bronze-phosphor
b) beryllium-phosphor and bronze-copper
7. The application of a contact diode is_________
a) Clampers and clippers
b) Voltage multipliers
d) AM detectors
8. The operating frequencies of the point contact diode is_________
a) 30KHz or above
b) 10GHz or above
c) 30GHz or above
d) 10KHz or above
9. During the manufacture of point contact diode, why is a relatively large current passed from cat whisker to silicon crystal?
a) to control the amount of current flow
b) to form small region of p type material
c) to allow mechanical support for the sections
d) to form anode and cathode regions
10. What is the capacitive reactance across the point contact diode when compared to normal PN junction diode
d) cannot be determined
1. Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. What is (approximately) the peak sine-wave input signal that can be applied without output clipping?
a) 7 mV
b) 10 mV
c) 13 mV
(Q2 & Q.3) Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. If the effect of VOs(input offset voltage) is nulled at room temperature (250C), how large an input can one now apply if:
2. The circuit is to operate at a constant temperature?
a) 8.5 mV
b) 9 mV
c) 9.5 mV
d) 10 mV
3. The circuit is to operate at a temperature in the range 0°C to 75°C and the temperature coefficient of VOS is 10 μV/°C?
a) 8.5 mV
b) 9 mV
c) 9.5 mV
d) 10 mV
4. One of the DC imperfections of the amplifiers are dc offset voltage which is
a) Existence of output signal even when the common mode signal is zero
b) Existence of common mode signal causing zero output signal
c) Existence of output signal even when the differential signal is zero
d) Existence of differential signal causing zero output signal
5. For the amplifier shown determine the value of the bias current (Ib) and input offset current (Io) respectively.
a) Ib = IB1 + IB2 Io = IB1 – IB2
b) Ib = IB1 + IB2 Io = | IB1 – IB2 |
c) Ib = 0.5(IB1 + IB2) Io = | IB1 – IB2 |
d) Ib = 0.5(IB1 + IB2) Io = IB1 – IB2
6. Consider the circuit shown below which reduces the impact of the input bias current. If IB1 = IB2 = Input bias current, then determine the value of R3 so that the output voltage (v0) is not impacted by the input bias current.
a) (R1 R2)/(R1+R2)
b) (R1 R2)/(R1-R2)
c) R1-(R1 R2)/(R1+R2)
d) R2- (R1 R2)/(R1+R2)
7. Consider an inverting amplifier circuit designed using an op amp and two resistors, R1 = 10 kΩ and R2 = 1 MΩ. If the op amp is specified to have an input bias current of 100 nA and an input offset current of 10 nA, find the output dc offset voltage resulting.
a) 0.1 mV
b) 1 mV
c) 10 mV
d) 100 mV
(Q.8-Q.10) Consider a Miller integrator with a time constant of 1ms and an input resistance of 10 kΩ. Let the op amp have VOS (offset voltage) = 2 mV and output saturation voltages of ±12 V.
8. Assuming that when the power supply is turned on the capacitor voltage is zero, how long does it take for the amplifier to saturate?
9. Select the largest possible value for a feedback resistor RF so that at least ±10 V of output signal swing remains available.
a) 10 kΩ
b) 100 kΩ
c) 1 MΩ
d) 10 MΩ
10. What is the corner frequency of the resulting STC network?
a) 1 Hz
b) 0.16 Hz
c) 0.33 Hz
d) 0.5 Hz