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Multiple choice question for engineering

Set 1

1. What do you mean by micro in microcontroller?
a) Distance between 2 IC’s
b) Distance between 2 transistors
c) Size of a controller
d) Distance between 2 pins

View Answer

Answer: b [Reason:] Micro means 10-6 which gives the distance between 2 element transistors which is called as Micron Technology.

2. What is the bit size of the 8051 microcontroller?
a) 8-bit
b) 4-bit
c) 16-bit
d) 32-bit

View Answer

Answer: a [Reason:] It is an 8-bit microcontroller which means most of the operations are limited to 8 bit only.

3. Name the architecture and the instruction set for microcontroller?
a) Van- Neumann Architecture with CISC Instruction Set
b) Harvard Architecture with CISC Instruction Set
c) Van- Neumann Architecture with RISC Instruction Set
d) Harvard Architecture with RISC Instruction Set

View Answer

Answer: b [Reason:] Harvard architecture has different memory spaces for both program memory and data memory with Complex Instruction Set Computer(CISC).The difference between CISC and RISC is RISC has few instructions than CISC. Where as in Van- Neumann, program and data memory are same. Van- Neumann is also called as Princeton architecture.

4. Number of I/O ports in the 8051 microcontroller?
a) 3 ports
b) 4 ports
c) 5 ports
d) 4 ports with last port having 5 pins

View Answer

Answer: b [Reason:] It has 4 ports with port0 act as I/O port and also multiplexing of address and data bus. Port1act as I/O port. Port 2 act as I/O and also like address lines. Port 3 act as I/O and also for external peripherals.

5. Is ROM is used for storing data storage?
a) True
b) False

View Answer

Answer: b [Reason:] RAM is used for storing data storage and ROM is used for storing program memory.

6. SCON in serial port is used for which operation?
a) Transferring data
b) Receiving data
c) Controlling
d) Controlling and transferring

View Answer

Answer: c [Reason:] There are 2 pins available in serial port. One is used for transmission and other is used for receiving data. SCON is the bit in the serial port which is used for controlling the operation.

7. Program counter stores what?
a) Address of before instruction
b) Address of the next instruction
c) Data of the before execution to be executed
d) Data of the execution instruction

View Answer

Answer: b [Reason:] Points to the address of the next instruction to be executed from ROM .It is 16 bit register means the 8051 can access program address from 0000H to FFFFH. Total 64KB of code.

8. Auxiliary carry is set during which condition?
a) When carry is generated from D3 to D4
b) When carry is generated from D7
c) When carry is generated from both D3 to D4 and D7
d) When carry is generated at either D3 to D4 or D7

View Answer

Answer: a [Reason:] When carry is generated from D3 to D4, it is set to 1, it is used in BCD arithmetic.

9. What is order of the assembly and running 8051 program?
i) Myfile.asm
ii) Myfile.lst
iii) Myfile.obj
iv) Myfile.hex
a) i,ii,iii,iv
b) ii,iii,I,iv
c) iv,ii,I,iii
d) iii,ii,I,iv

View Answer

Answer: a [Reason:] After writing the program in editor and compilation first .asm, .lst, .obj, .hex are created.

10. The use of Address Latch Enable is to multiplex address and data memory.
a) True
b) False

View Answer

Answer: a [Reason:] That is used for multiplexting address and data ie., the same line carries address and data. To indicate when it carries address, ALE is emitted by 8051.

11. Which pin provides a reset option in 8051?
a) Pin 1
b) Pin 8
c) Pin 11
d) Pin 9

View Answer

Answer: d [Reason:] Reset pin is utilized to set the micro controller 8051 to its primary values, whereas the micro controller is functioning or at the early beginning of application. The reset pin has to be set elevated for two machine rotations.

12. External Access is used to permit ____________
a) Peripherals
b) Power supply
c) ALE
d) Memory interfacing

View Answer

Answer: d [Reason:] External Access input is employed to permit or prohibit outer memory interfacing. If there is no outer memory needed,this pin is dragged by linking it to Vcc.

13. What is the address range of SFRs?
a) 80h to feh
b) 00h to ffh
c) 80h to ffh
d) 70h to 80h

View Answer

Answer: c [Reason:] In 8051 there certain registers which uses the RAM addresses from80h to ffh. These are called as Special Function Registers. Some of the SRFrs are I/o ports and control operations as TCON, SCON, PCON.

14. How many interrupts are there in micro controller?
a) 3
b) 6
c) 4
d) 5

View Answer

Answer: d [Reason:] An interrupt is the external or internal event that disturbs the microcontroller to inform if that needs its services. There are 5 interrupts : Timer 0 overflow interrupt Timer 1 overflow interrupt External Interrupt 0 External Interrupt 1 Serial port events.

15. Timer 0 is a ________ bit register.
a) 32-bit
b) 8-bit
c) 16-bit
d) 10-bit

View Answer

Answer: c [Reason:] The Timer 0 is a 16-bit register and can be treated as two 8-bit registers and these can be accessed similar to any other registers.

Set 2

1. What is the processor used by ARM7?
a) 8-bit CISC
b) 8-bit RISC
c) 32-bit CISC
d) 32-bit RISC

View Answer

Answer: d [Reason:] ARM7 is a group 32-bit RISC ARM processor cores licensed by ARM Holdings for microcontroller use.

2. What is the instruction set used by ARM7?
a) 16-bit instruction set
b) 32-bit instruction set
c) 64-bit instruction set
d) 8-bit instruction set

View Answer

Answer: a [Reason:] ARM introduced the Thumb 16-bit instruction set providing improved code density compared to previous designs. The most widely used ARM7 designs implement the ARMv4T architecture, but some implement ARM3 or ARMv5TEJ.

3. How many registers are there in ARM7?
a) 35 register( 28 GPR and 7 SPR)
b) 37 registers(28 GPR and 9 SPR)
c) 37 registers(31 GPR and 6 SPR)
d) 35 register(30 GPR and 5 SPR)

View Answer

Answer: c [Reason:] ARM7TDMI has 37 registers(31 GPR and 6 SPR). All these designs use a Von Neumann architecture, thus the few versions comprising a cache do not separate data and instruction caches.

4. ARM7 has a in-built debugging device?
a) True
b) False

View Answer

Answer: a [Reason:] Some ARM7 cores are obsolete. It had a JTAG based on-chip debugging; the preceding ARM6 cores did not support it. The “D” represented a JTAG TAP for debugging.

5. What is the capability of ARM7 f instruction for second?
a) 110 MIPS
b) 150 MIPS
c) 125 MIPS
d) 130 MIPS

View Answer

Answer: d [Reason:] It is a versatile device for mobile devices and other low power electronics. This processor architecture is capable of up to 130MIPS on a typical 0.13 um process.

6. We have no use of having silicon customization?
a) True
b) False

View Answer

Answer: b [Reason:] It achieve custom design goals, such as higher clock speed, very low power consumption, instruction set extension, optimization for size, debug support, etc.

7. Which of the following has the same instruction set as ARM7?
a) ARM6
b) ARMv3
c) ARM71a0
d) ARMv4T

View Answer

Answer: b [Reason:] The original ARM7 was based on the earlier ARM6 design and used the same ARM3 instruction set.

8. What are t, d, m, I stands for in ARM7TDMI?
a) Timer, Debug, Multiplex, ICE
b) Thumb, Debug, Multiplier, ICE
c) Timer, Debug, Modulation, IS
d) Thumb, Debug, Multiplier, ICE

View Answer

Answer: b [Reason:] The ARM7TDMI(ARM7 + 16 bit Thumb + JTAG Debug + fast Multiplier + enhanced ICE) processor implements the ARM4 instruction set.

9. ARM stands for _________
a) Advanced RISC Machine
b) Advanced RISC Methadology
c) Advanced Reduced Machine
d) Advanced Reduced Methadology

View Answer

Answer: a [Reason:] ARM, originally Acorn RISC Machine, later Advanced RISC Machine, is a family of reduced instruction set computing (RISC) architectures for computing processors.

10. What are the profiles for ARM architecture?
a) A,R
b) A,M
c) A,R,M
d) R,M

View Answer

Answer: c [Reason:] ARMv7 defines 3 architecture “profiles”: A-profile, Application profile R-profile, Real-time profile M-profile,Microcontroller profile.

11. ARM7DI operates in which mode?
a) Big Endian
b) Little Endian
c) Both big and little Endian
d) Neither big nor little Endian

View Answer

Answer: c [Reason:] Big Endian configuration, when BIGEND signal is HIGH the processor treats bytes in memory as being in Big Endian format. When it is LOW memory is treated as little Endian.

12. In which of the following ARM processors virtual memory is present?
a) ARM7DI
b) ARM7TDMI-S
c) ARM7TDMI
d) ARM7EJ-S

View Answer

Answer: a [Reason:] ARM7DI is capable of running a virtual memory system. The abort input to the processor may be used by the memory manager to inform ARM7DI of page faults.

13. How many instruction pipelining is used in ARM7EJ-S?
a) 3-Stage
b) 4-Stage
c) 5-Stage
d)2-stage

View Answer

Answer: c [Reason:] A five-stage pipelining is used, consisting of Fetch, Decode, Execute, Memory, and Writeback stages. A six-stage pipelining is used in Jazelle state, consisting of Fetch, Jazelle, Execute, Memory, and Writeback stages.

14. How many bit data bus is used in ARM7EJ-s?
a) 32-bit
b) 16-bit
c) 8-bit
d) Both 16 and 32 bit

View Answer

Answer: a [Reason:] The ARM7EJ-s processor has a Von Neumann architecture. This feature is a single 32-bit data bus that carries both instructions and data. Only load, store, and swap instructions can access data from memory. Data can be 8- bit.

15. What is the cache memory for ARM710T?
a) 12Kb
b) 16Kb
c) 32Kb
d) 8Kb

View Answer

Answer: d [Reason:] The ARM710T is a general purpose 32-bit microprocessor with 8Kb cache, enlarged write buffer and memory management unit combined in a single chip.

Set 3

1. MQTT is mainly used for __________
a) M2M communication
b) Device communication
c) Internet communication
d) Wireless communication

View Answer

Answer: a [Reason:] MQTT is a public messaging protocol designed for lightweight M2M communication. It was originally developed by IBM and is now an open standard.

2. Which is open standard?
a) CoAP
b) MQTT
c) XMPP
d) HTTP

View Answer

Answer: b [Reason:] IoT needs standard protocols. Two of the most promising for small devices are MQTT and CoAP. Both ate standard protocols.

3. MQTT is _________ oriented.
a) Data
b) Message
c) Network
d) Device

View Answer

Answer: b [Reason:] MQTT is message oriented. Every message is a discrete chunk of data, opaque to the broker MQTT is message oriented. Every message is a discrete chunk of data, opaque to the broker.

4. Who created MQTT?
a) Robert Cailliau
b) Tim Berners-Lee
c) Andy Stanford-Clark
d) Vint Cerf

View Answer

Answer: c [Reason:] MQTT is created by Andy Stanford-Clark in It was originally developed by IBM and is now an open standard.

5. Does MQTT support security?
a) True
b) False

View Answer

Answer: a [Reason:] Yes, You can pass a user name and password with an MQTT packet in V3.1 of the protocol.

6. Standard ports of MQTT are __________
a) I2C
b) SSL
c) USART
d) TCP/IP

View Answer

Answer: d [Reason:] Standard ports of MQTT are TCP/IP. TCP/IP port 1883 is reserved with IANA for use with MQTT.

7. Full form of MQTT _____
a) Message Queuing Telemetry Transport
b) Message Queuing Telegram Transport
c) Message Queue Telegram Transport
d) Message Queue Telemetry Transport

View Answer

Answer: a [Reason:] MQTT (Message Queuing Telemetry Transport) is a lightweight messaging protocol that provides resource-constrained network clients with a simple way to distribute telemetry information.

8. What are the key components of a M2M system?
a) Vortex DDS
b) Smart Homes
c) Sensors and Wi-Fi
d) Protocols

View Answer

Answer: c [Reason:] Following are the key components of a M2M system. Sensors RFID (Radio Frequency Identification) Wi-Fi Autonomic Computing.

9. Request field is present in which message format?
a) Request message
b) Response message
c) Both request and response
d) Neither request nor response

View Answer

Answer: a [Reason:] The request message consists of a request line(e.g., GET /image/logo.png HTTP/1.1, which requests a resource called /image/logo.png from the server).

10. URI and content type support is which protocol feature?
a) SPI
b) UDP
c) HTTP
d) CoAP

View Answer

Answer: d [Reason:] CoAP needs to consider optimizing length of datagram and satisfying REST protocol to support URI. It also needs to provide dependable communication based on UDP protocol.

Set 4

1. _______ makes it possible for two or more activities to execute in parallel on a single processor.
a) Multithreading
b) Threading
c) SingleThreading
d) Both Multithreading and SingleThreading

View Answer

Answer: a [Reason:] MultiThreading makes it possible for two or more activities to execute in parallel on a single processor.

2. In ______ an object of type Thread in the namespace System.Threading represents and controls one thread.
a) . PY
b) .SAP
c) .NET
d) .EXE

View Answer

Answer: c [Reason:] In .NET, an object of type Thread in the namespace System.Threading represents and controls one thread.Its constructor takes a parameterless method as a parameter.

3. The method will be executed once the thread’s ______ method is called.
a) EventBegin
b) EventStart
c) Begin
d) Start

View Answer

Answer: d [Reason:] In .NET, an object of type Thread in the namespace System.Threading represents and controls one thread.Its constructor takes a parameter less method as a parameter. The method will be executed once the threads Start method is called.

4. Command to make thread sleep?
a) Thread.Sleep
b) Thread_Sleep
c) ThreadSleep
d) Thread_sleep

View Answer

Answer: a [Reason:] A particular thread of the application can be blocked forever by calling Thread.Sleep(Timeout.Infinite).

5. An instance of class Buffer provides a threadsafe way of communication between ________
a) Actors
b) Objects
c) Locking
d) Buffer

View Answer

Answer: b [Reason:] An instance of class Buffer provides a threadsafe way of communication between actors. A buffer instance basically acts as a variable whose current value can be read and written.

6. _______ method puts zero into the buffer
a) HandlePut(object o)
b) HandletGet(object o)
c) HandletGet()
d) HandletPut()

View Answer

Answer: a [Reason:] void HandlePut(object o) method puts 0 into buffer. The new value in the buffer replaces the old one.

7. HandlePut(object o) performs what?
a) Fixing values
b) Locking
c) Changing values
d) Unlocking

View Answer

Answer: d [Reason:] void HandlePut(object o) method puts 0 into buffer. The new value in the buffer replaces the old one. The method performs the necessary locking to enable safe use of the buffer from multi threads.

8. In HandlePut(object o), o represents?
a) Null
b) Zero
c) Empty
d) Origin

View Answer

Answer: a [Reason:] void HandlePut(object o) method puts 0 into buffer. The new value in the buffer replaces the old one. The method performs the necessary locking to enable safe use of the buffer from multi threads. Object o may be NULL.

9. What is HandleGet() method function?
a) Current buffer state, with changing
b) Current buffer state, without changing
c) Previous buffer state, with changing
d) Previous buffer state, without changing

View Answer

Answer: b [Reason:] This method gets the current buffer state, without changing it. The method performs the necessary locking to enable safe of the buffer from multiple threads.

10. What is the result for HandleGet()?
a) Null
b) Zero
c) Empty
d) Origin

View Answer

Answer: a [Reason:] This method gets the current buffer state, without changing it. The method performs the necessary locking to enable safe of the buffer from multiple threads. The result may be null.

11. Multithreading is a mechanism for splitting up a program into several parallel activities called _________
a) Methods
b) Objects
c) Classes
d) Threads

View Answer

Answer: c [Reason:] Multithreading is a mechanism for splitting up a program into several parallel activities called threads. Multithreading makes it possible for two or more activities to execute in parallel on a single processor.

12. Each thread is a single stream of execution.
a) False
b) True

View Answer

Answer: a [Reason:] Multithreading is a mechanism for splitting up a program into several parallel activities called threads. Each thread is a single stream of execution, yet they all share the same resources.

13. Multithreading on a single processor is possible with the help of _________
a) Threader
b) Scheduler
c) Method
d) Divider

View Answer

Answer: b [Reason:] Multithreading on a single processor is possible with the help of scheduler, which briefly stops the currently execution thread of an application after each time slice.

14. Scheduler switch threads in ________
a) Multilevel queue scheduling
b) Priority Scheduling
c) Round robin fashion
d) Multilevel feedback queue scheduling

View Answer

Answer: c [Reason:] It switches among threads in a round robin fashion so that every thread gets its fair share of processing time.

15. What is the switching speed?
a) 60 times per second
b) 50 times per second
c) 55 times per second
d) 66 times per second

View Answer

Answer: b [Reason:] Switching among threads occurs so frequently -50 times per second that all threads appear to run in parallel.

Set 5

1. Which level is the network layer in the OSI model?
a) Third level
b) Fourth level
c) Second level
d) Fifth layer

View Answer

Answer: a [Reason:] The network layer is the third level of the open system interconnection model and the layer that provides data routing paths for network communication.

2. Data in network layer is transferred in the form of ____________
a) Layers
b) Packets
c) Bytes
d) Bits

View Answer

Answer: b [Reason:] Data is transferred in the form of packets via logical network paths in an ordered format controlled by the network layer.

3. The network layer is considered as the _______ of the network layer.
a) backbone
b) packets
c) bytes
d) bits

View Answer

Answer: a [Reason:] The network layer is considered as the backbone of the network layer. It selects and manages the best logical path for data transfer between nodes.

4. The network layer contains which hardware device?
a) Routers, Bridges
b) Bridges only
c) Bridges and switches
d) Routers, Bridges and Switches

View Answer

Answer: d [Reason:] This layer contains hardware devices such as routers, bridges, firewalls, and switches, but it actually creates a logical image of the most efficient communication rout and implements it with a physical medium.

5. Network layer protocol exits in _________
a) Host
b) Switches
c) Packets
d) Bridges

View Answer

Answer: a [Reason:] Network layer protocols exits in every host or router. The router examines the header fields of all the IP packets that pass through it.

6. What are the common protocols associated with the network layer?
a) Address Resolution Protocol
b) Reverse Address Resolution Protocol
c) Internet protocol
d) Neighbour Discovery Protocol

View Answer

Answer: c [Reason:] Internet protocol and Netware IPX/SPX are the most common protocols associated with the network layer.

7. The network layer responds to request from which layer?
a) Transport layer
b) Data layer
c) Application layer
d) Session layer

View Answer

Answer: a [Reason:] In OSI model, we are having 7 layers in which the network layer responds to request from the layer above it called Transport Layer.

8. The network layer issues request to which layer?
a) Transport layer
b) Data layer
c) Application layer
d) Session layer

View Answer

Answer: b [Reason:] In OSI model, we are having 7 layers in which the network layer issues request to the layer below it called Data Link Layer.

9. IP is connectionless?
a) True
b) False

View Answer

Answer: a [Reason:] IP is connectionless, is that a data packet can travel from a sender to a receiver without the recipient having to send an acknowledgment connection-oriented protocols exits at other, higher layers of the OSI model.

10. Does network layer in TCP/IP and OSI Model are same?
a) True
b) False

View Answer

Answer: b [Reason:] The TCP/IP Internet layer is in fact only a subset of functionality of the network layer. It describes only one type of network architecture, the Internet.

11. What are called routers?
a) The devices that operates at session layer
b) The devices that operates at data layer
c) The devices that operates at application layer
d) The devices that operates at network

View Answer

Answer: d [Reason:] The network interconnection devices that operate at the network layer are usually called routes, which at this point should hopefully come as no surprise to you.

12. ICMP stands for __________
a) Internet Coordinate Message Protocol
b) Internet Control Message Protocol
c) Interconnect Control Message Protocol
d) Interconnect Coordinate Message Protocol

View Answer

Answer: b [Reason:] The Internet Protocol is the key network layer protocol that implements the TCP/IP Protocol suites. Since IP is the protocol that provides the mechanism for delivering datagrams, between devices, it is designed to be relatively basic, and to function with few “bell and whistles”.

13. Packets will be transferred in how many types?
a) 5 types
b) 4 types
c) 2 types
d) 3 types

View Answer

Answer: d [Reason:] Routing deals with determining how packet will routed (transferred) from source to destination. It can of three types : 1. Static 2. Dynamic 3. Semi Dynamic.

14. DDP stands for _________
a) Datagram Delivery Protocol
b) Device Delivery Protocol
c) Datagram Device Protocol
d) Device Datagram Protocol

View Answer

Answer: a [Reason:] Datagram Delivery Protocol is a member of the AppleTalk networking protocol suite. Its main responsibility is for socket to socket delivery of datagram over an AppleTalk network.

15. RIP stands for ________
a) Reduced Information Protocol
b) Routing Internet Protocol
c) Routing Information Protocol
d) Reduced Internet Protocol

View Answer

Answer: c [Reason:] The Routing Information Protocol is one of the oldest distance vector routing protocols which employ the hop count as a routing metric.