# Multiple choice question for engineering

## Set 1

1. Half subtractor is used to perform subtraction of

a) 2 bits

b) 3 bits

c) 4 bits

d) 5 bits

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2. For subtracting 1 from 0, we use to take a _______ from neighbouring bits.

a) Carry

b) Borrow

c) Not possible

d) None of the Mentioned

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3. How many outputs are required for the implementation of a subtractor?

a) 1

b) 2

c) 3

d) 4

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4. Let the input of a subtractor is A and B then what the output will be if A = B?

a) 0

b) 1

c) A

d) B

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5. Let A and B is the input of a subtractor then the output will be

a) A XOR B

b) A AND B

c) A OR B

d) A EXNOR B

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6. Let A and B is the input of a subtractor then the borrow will be

a) A * B’

b) A’ * B

c) A OR B

d) A AND B

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7. What does minuend and subtrahend denotes in a subtractor?

a) Their corresponding bits of input

b) Its outputs

c) Its inputs

d) None of the Mentioned

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8. Full subtractor is used to perform subtraction of

a) 2 bits

b) 3 bits

c) 4 bits

d) 8 bits

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9. The full subtractor can be implemented using

a) Two XOR and an OR gates

b) Two half subtractors and an OR gate

c) Two multiplexers and an AND gate

d) None of the Mentioned

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10. The output of a subtractor is given by (if A, B and X are the inputs)

a) A AND B XOR X

b) A XOR B XOR X

c) A OR B NOR X

d) A NOR B XOR X

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11. The output of a full subtractor is same as

a) Half adder

b) Full adder

c) Half subtractor

d) None of the Mentioned

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## Set 2

1. The full form of IIL is

a) Injection integrated logic

b) Integrated inspected logic

c) Integrated injection logic

d) None of the Mentioned

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2. Integrated injection logic is a class of digital circuits built with

a) Single collector BJT

b) Double emitter BJT

c) Multiple emitter BJT

d) Multiple collector BJT

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3. IIL has _____ noise immunity.

a) High

b) Low

c) Neutral

d) None of the Mentioned

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4. IIL is sometimes also known as

a) Single transistor logic

b) Multiple transistor logic

c) Merged transistor logic

d) None of the Mentioned

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5. Integrated Injection logic can not be denoted as

a) IIL

b) I2L

c) I^{2L}

d) None of the Mentioned

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6. The heart of an I2L circuit is the

a) Common collector open emitter inverter

b) Common emitter open collector inverter

c) Open emitter common collector inverter

d) None of the Mentioned

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7. In Integrated Injection logic input is supplied to the

a) Emitter

b) Base

c) Collector

d) None of the Mentioned

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8. In Integrated Injection logic output is received through the

a) Emitter

b) Base

c) Collector

d) None of the Mentioned

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9. When the outputs of two inverters are wired together the result is

a) A two-input NOR gate

b) A single-input NOR gate

c) A two-input NAND gate

d) A single-input NAND gate

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10. IIL was commonly used before the advent of CMOS logic by company ________

a) Samsung

b) Nokia

c) Motorola

d) Apple

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11. Which company introduced one of the first consumer-grade digital watches (the Black Watch) which used I2L technology ?

a) Cambridge Consultants Pvt Ltd

b) Sinclair Radionics Ltd

c) National Research and Development Council

d) Westminster

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## Set 3

1. The basic building blocks of the arithmetic unit in a digital computers are

a) Subtractors

b) Adders

c) Multiplexer

d) None of the Mentioned

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2. A digital system consists of _____ types of circuits.

a) 2

b) 3

c) 4

d) 5

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3. In a combinational circuit, the output at any time depends only on the _______ at that time.

a) Voltage

b) Intermediate values

c) Input values

d) None of the Mentioned

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4. In a sequential circuit, the output at any time depends only on the input values at that time.

a) Past output values

b) Intermediate values

c) Present input values

d) Both past output and present input

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5. Procedure for the design of combinational circuits are:

A. From the word description of the problem, identify the inputs and outputs and draw a block diagram.

B. Draw the truth table such that it completely describes the operation of the circuit for different combinations of inputs.

C. Simplify the switching expression(s) for the output(s).

D. Implement the simplified expression using logic gates.

E. Write down the switching expression(s) for the output(s).

a) B, C, D, E, A

b) A, D, E, B, C

c) A, B, E, C, D

d) None of the Mentioned

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6. All logic operations can be obtained by means of

a) AND and NAND operations

b) OR and NOR operations

c) OR and NOT operations

d) AND, OR and NOT operations

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7. The design of an ALU is based on

a) Sequential logic

b) Combinational logic

c) Multiplexing

d) None of the Mentioned

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8. If the two numbers are unsigned, the bit conditions of interest are the ______ carry and a possible _____ result.

a) Input, zero

b) Output, one

c) Input, one

d) Output, zero

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9. If the two numbers include a sign bit in the highest order position, the bit conditions of interest are the sign of the result, a zero indication and

a) An underflow condition

b) A neutral condition

c) An overflow condition

d) None of the Mentioned

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10. The flag bits in an ALU is defined as

a) The total number of registers

b) The status bit conditions

c) The total number of control lines

d) All of the Mentioned

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## Set 4

1. A Karnaugh map (K-map) is an abstract form of ____________ diagram organized as a matrix of squares.

a) Venn Diagram

b) Cycle Diagram

c) Block diagram

d) Triangular Diagram

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2. There are ______ cells in a 4-variable K-map.

a) 12

b) 16

c) 18

d) None of the Mentioned

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3. The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.

a) Impact

b) Non Impact

c) Force

d) None of the Mentioned

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4. Each product term of a group, w’.x.y’ and w.y, represents the ____________in that group.

a) Input

b) POS

c) Sum-of-Minterms

d) None of the Mentioned

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5. The prime implicant which has at least one element that is not present in any other implicant is known as

a) Essential Prime Implicant

b) Implicant

c) Complement

d) None of the Mentioned

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6. Product-of-Sums expressions can be implemented using

a) 2-level OR-AND logic circuits

b) 2-level NOR logic circuits

c) 2-level XOR logic circuits

d) Both 2-level OR-AND and NOR logic circuits

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7. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given

a) Function

b) Value

c) Set

d) None of the Mentioned

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8. Don’t care conditions can be used for simplifying Boolean expressions in

a) Examples

b) Terms

c) K-maps

d) Latches

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9. It should be kept in mind that don’t care terms should be used along with the terms that are present in

a) Minterms

b) Maxterm

c) K-Map

d) Latches

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10. Using the transformation method you can realize any POS realization of OR-AND with only.

a) XOR

b) NAND

c) AND

d) NOR

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11. There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and _________________ operations.

a) X-NOR

b) XOR

c) NOR

d) NAND

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12. These logic gates are widely used in _______________ design and therefore are available in IC form.

a) Circuit

b) Digital

c) Analog

d) Block

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13. In case of XOR/XNOR simplification we have to look for the following____________________

a) Diagonal Adjacencies

b) Offset Adjacencies

c) Straight Adjacencies

d) Both diagonal and offset adjencies

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14. Entries known as _______________ mapping.

a) Diagonal

b) Straight

c) K

d) None of the Mentioned

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## Set 5

1. Which statement below best describes a Karnaugh map?

a) It is simply a rearranged truth table

b) The Karnaugh map eliminates the need for using NAND and NOR gates

c) Variable complements can be eliminated by using Karnaugh maps

d) A Karnaugh map can be used to replace Boolean rules

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2. Which of the examples below expresses the commutative law of multiplication?

a) A + B = B + A

b) A • B = B + A

c) A • (B • C) = (A • B) • C

d) A • B = B • A

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3. The Boolean expression Y = (AB)’ is logically equivalent to what single gate?

a) NAND

b) NOR

c) AND

d) OR

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4. The observation that a bubbled input OR gate is interchangeable with a bubbled output AND gate is referred to as:

a) A Karnaugh map

b) DeMorgan’s second theorem

c) The commutative law of addition

d) The associative law of multiplication

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5. The systematic reduction of logic circuits is accomplished by:

a) Symbolic reduction

b) TTL logic

c) Using Boolean algebra

d) Using a truth table

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6. Each “1” entry in a K-map square represents:

a) A HIGH for each input truth table condition that produces a HIGH output

b) A HIGH output on the truth table for all LOW input combinations

c) A LOW output for all possible HIGH input conditions

d) A DON’T CARE condition for all possible input truth table combinations

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7. Each “0” entry in a K-map square represents:

a) A HIGH for each input truth table condition that produces a HIGH output

b) A HIGH output on the truth table for all LOW input combinations

c) A LOW output for all possible HIGH input conditions

d) A DON’T CARE condition for all possible input truth table combinations

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8. Which of the following statements accurately represents the two BEST methods of logic circuit simplification?

a) Boolean algebra and Karnaugh mapping

b) Karnaugh mapping and circuit waveform analysis

c) Actual circuit trial and error evaluation and waveform analysis

d) Boolean algebra and actual circuit trial and error evaluation

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9. Looping on a K-map always results in the elimination of

a) Variables within the loop that appear only in their complemented form

b) Variables that remain unchanged within the loop

c) Variables within the loop that appear in both complemented and uncomplemented form

d) Variables within the loop that appear only in their uncomplemented form

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10. Which of the following expressions is in the sum-of-products form?

a) (A + B)(C + D)

b) (A * B)(C * D)

c) A* B *(CD)

d) A * B + C * D

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11. Which of the following is an important feature of the sum-of-products form of expressions?

a) All logic circuits are reduced to nothing more than simple AND and OR operations

b) The delay times are greatly reduced over other forms

c) No signal must pass through more than two gates, not including inverters

d) The maximum number of gates that any signal must pass through is reduced by a factor of two

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12. Which of the following expressions is in the product-of-sums form?

a) (A + B)(C + D)

b) (AB)(CD)

c) AB(CD)

d) AB + CD