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Multiple choice question for engineering

Set 1

1. Which of the following DMA is used in the IBM PC?
a) Intel 8253
b) Intel 8254
c) Intel 8237
d) Intel 8259

View Answer

Answer: c [Reason:] The Intel 8237 is the DMA used in the IBM PC. 8253,8254 and 8259 are timers developed by Intel.

2. Which of the following have four transfer modes?
a) Intel 8253
b) Intel 8254
c) Intel 8259
d) Intel 8237

View Answer

Answer: d [Reason:] The Intel 8237 have four transfer modes. These are single mode, block transfer mode, demand mode and cascade mode.

3. Identify the additional transfer mode in the Intel 8237?
a) single transfer mode
b) demand transfer mode
c) verify transfer mode
d) block transfer mode

View Answer

Answer: c [Reason:] In addition to the four main transfer mode, there is a verify transfer mode which is used within the PC to create dummy addresses which is used for refreshing the DRAM.

4. Which of the following transfer mode can refresh the DRAM memory?
a) verify transfer mode
b) bloch transfer mode
c) demand transfer mode
d) cascade mode

View Answer

Answer: a [Reason:] The verify address transfer mode can generate dummy addresses which is used for the DRAM refreshing.

5. Which of the following is used for supporting the priority scheme?
a) address transfer mode
b) arbitration
c) counter
d) timer

View Answer

Answer: b [Reason:] The arbitration is used for providing priority to the DMA requests. The DMA request are simultaneously generating, so in order to avoid the errors, a priority scheme is necessary which is done by the arbitration scheme in the DMA controller.

6. Which of the following consist of a fully programmable DMA controller of two channels?
a) MC68300
b) Intel 8237
c) Intel 8253
d) Intel 8254

View Answer

Answer: a [Reason:] The MC68300 is developed by Motorola, which consists of a two channel fully programmable DMA controller which can support high speed data transfer.

7. Which cycle can support the burst and single transfer mode?
a) internal
b) external
c) both internal and external
d) address cycle

View Answer

Answer: b [Reason:] The internal cycles can be programmed to occupy the partial or complete fulfillment of the available internal bus bandwidth while the external cycles provides support to the single transfer modes and burst mode.

8. Which of the following requires its own local memory and program?
a) DMA controller
b) DMA address
c) DMA CPU
d) DMA peripheral

View Answer

Answer: c [Reason:] The DMA CPU has its own address local memory and program so that it will not harm main memory bus and it is completely isolated.

9. Which DMA is programmed with higher level software?
a) DMA controller
b) DMA address
c) DMA peripheral
d) DMA CPU

View Answer

Answer: d [Reason:] The DMA CPU is programmed with higher level software which is used to transfer the data and for processing it.

10. Which of the following combine an MC68000/MC68020 type of processor with peripheral and DMA controllers?
a) Intel 8237
b) Intel 8253
c) MC68300
d) MC68000

View Answer

Answer: c [Reason:] The MC68300 combines the processors along with the DMA controllers. The processors which support the MC68300 series are MC68000 or MC68020.

Set 2

1. Which interrupts are generated by the on-chip peripherals?
a) internal
b) external
c) software
d) hardware

View Answer

Answer: a [Reason:] The internal interrupts are generated by the serial and parallel ports which are on-chip peripherals.

2. Which of the following is the common method for the connecting the peripheral to the processor?
a) internal interrupts
b) external interrupts
c) software
d) exception

View Answer

Answer: b [Reason:] The common method for connecting the peripheral to the processor is the external interrupts. The external interrupts are provided through the external pins which are connected to the peripherals.

3. Which interrupt can make a change in the processor’s mode?
a) internal interrupt
b) external interrupts
c) exceptions
d) software mode

View Answer

Answer: c [Reason:] An exception is an event which changes the software flow to process the event. It includes both internal and external interrupts which cause the processor to change to a service routine.

4. How many exceptions does an MC68000 have?
a) 256
b) 128
c) 90
d) 70

View Answer

Answer: c [Reason:] The MC68000 have 256 table entries which describe 90 exceptions.

5. Which interrupts allows a protected state?
a) internal interrupt
b) external interrupt
c) software interrupt
d) both internal and external interrupts

View Answer

Answer: c [Reason:] The software interrupt can change the processor into a protected state by changing the program flow.

6. How a software interrupt is created?
a) instruction set
b) sequential code
c) concurrent code
d) porting

View Answer

Answer: a [Reason:] The software interrupts includes a set of instructions for handling interrupts. The instruction set allows a currently executing program to change its flow.

7. What does SWI stand for?
a) standard interrupt instruction
b) sequential interrupt instruction
c) software interrupt instruction
d) system interrupt instruction

View Answer

Answer: c [Reason:] The instruction set of software interrupts are provided by the special instruction set. One such is the SWI which is commonly used in Z80.

8. Which of the following use SWI as interrupt mechanism?
a) PowerPC
b) MC68000
c) Z80
d) IBM PC

View Answer

Answer: c [Reason:] The PowerPC and MC68000 use TRAP instruction set for accessing software interrupt. IBM PC uses 8086 NMI. Z80 uses SWI for accessing software interrupts.

9. Which of the following supplies additional data to the software interrupt?
a) internal interrupt
b) external interrupt
c) software interrupt
d) nmi

View Answer

Answer: c [Reason:] For using the software interrupt more effectively, the additional data are used, which specifies the type of the request and data parameters are passed to the specific ISR. This additional data are offered by certain registers.

10. Which software interrupt is used in MC68000?
a) Internal interrupt
b) TRAP
c) SWI
d) NMI

View Answer

Answer: b [Reason:] The MC68000 uses software interrupt mechanism for accessing interrupts from the peripheral in which the instruction are created using the TRAP mechanism.

11. Which of the following are accessible by the ISR in software interrupt mechanism?
a) register
b) interrupt
c) nmi
d) memory

View Answer

Answer: a [Reason:] The additional data are offered by certain registers and these additional data are used to specify the type of the data parametrs and the request with the specific ISR when running in the software interrupt mode.

12. What allows the data protection in the software interrupt mechanism?
a) Different mode
b) Same mode
c) SWI
d) TRAP

View Answer

Answer: a [Reason:] The switching between user mode and supervisor mode provides protection for the processor, that is, the different modes in the software interrupt allows the memory and the associated code and data to be protected from each other.

13. What does NMI stand for?
a) non-machine interrupt
b) non-maskable interrupt
c) non-massive interrupt
d) non-memory interrupt

View Answer

Answer: b [Reason:] The NMI stand for the non-maskable interrupt in which the external interrupts cannot be masked out.

14. Which NMI is used in the IBM PC?
a) SWI
b) TRAP
c) 80×86 NMI
d) Maskable interrupt

View Answer

Answer: c [Reason:] The most commonly used non-maskable interrupt is the 80×86 NMI, which is implemented in the IBM PC.

15. Which can be used to pass the status information to the calling software in the software interrupt mechanism?
a) register
b) memory
c) flag
d) nmi

View Answer

Answer: a [Reason:] In order to use the software interrupt more effectively, the additional data are used to specify the type of the request and data parameters are passed to the specific ISR. This additional data are offered by certain registers. These registers are accessible by the ISR and it can also be used to pass the status information back to the calling software.

Set 3

1. The time taken to respond to an interrupt is known as
a) interrupt delay
b) interrupt time
c) interrupt latency
d) interrupt function

View Answer

Answer: c [Reason:] The interrupts are the most important function of the embedded system and are responsible for many problems while debugging the system. The time taken to respond to an interrupt is called the interrupt latency.

2. Into how many parts does the interrupt can split the software?
a) 2
b) 3
c) 4
d) 5

View Answer

Answer: a [Reason:] The software interrupt can split into two parts. These are foreground work and background work.

3. Which of the following allows the splitting of the software?
a) wait statement
b) ready
c) interrupt
d) acknowledgement

View Answer

Answer: c [Reason:] The interrupt can make the software into two main parts and these are foreground work and background work.

4. Which part of the software is transparent to the interrupt mechanism?
a) background
b) foreground
c) both background and foreground
d) lateral ground

View Answer

Answer: a [Reason:] The interrupt mechanism is transparent to the background software, that is, the background software is not aware of the existence of the foreground software.

5. Which part of the software performs tasks in response to the interrupts?
a) background
b) foreground
c) lateral ground
d) both foreground and background

View Answer

Answer: b [Reason:] In the foreground work, the tasks are performed in response to the interrupts but in the background work, the tasks are performed while waiting for an interrupt.

6. In which of the following method does the code is written in a straight sequence?
a) method 1
b) timing method
c) sequence method
d) spaghetti method

View Answer

Answer: d [Reason:] In the spaghetti method, the code is written in a straight sequence in which the analysis software goes and polls the port to see if there is data.

7. Which factor depends on the number of times of polling the port while executing the task?
a) data
b) data transfer rate
c) data size
d) number of bits

View Answer

Answer: b [Reason:] The data transfer rate can determine the number of times the port is polled while executing the task.

8. Which of the following can improve the quality and the structure of a code?
a) polling
b) subroutine
c) sequential code
d) concurrent code

View Answer

Answer: b [Reason:] The subroutine can improve the quality and the structure of the code. By using the polling method, as the complexity increases the software structure rapidly fall and it will become inefficient. So the subroutine method is adopted.

9. Which of the following are asynchronous to the operation?
a) interrupts
b) software
c) DMA
d) memory

View Answer

Answer: a [Reason:] The interrupts are asynchronous to the operation and therefore can be used with systems that are the event as opposed to the time driven.

10. Which of the following can be used to create time-driven systems?
a) memory
b) input
c) output
d) interrupts

View Answer

Answer: d [Reason:] The interrupts which are asynchronous can be used with systems that are the event as opposed to the time driven.

11. What does ISR stand for?
a) interrupt standard routine
b) interrupt service routine
c) interrupt software routine
d) interrupt synchronous routine

View Answer

Answer: b [Reason:] The data transfer codes are written as part of the interrupt service routine which is associated with the interrupt generation by the hardware.

12. Which can activate the ISR?
a) interrupt
b) function
c) procedure
d) structure

View Answer

Answer: a [Reason:] When the port receives the data, it will generate an interrupt which in turn activates the ISR.

13. Which code is written as part of the ISR?
a) data receive code
b) sequential code
c) data transfer code
d) concurrent code

View Answer

Answer: c [Reason:] The data transfer codes are written as part of the interrupt service routine which is associated with the interrupt generation by the hardware.

Set 4

1. Who started Linux first as a personal project?
a) Linus Torvalds
b) Ken Thompson
c) Dennis Ritchie
d) John Dell

View Answer

Answer: a [Reason:] The Linux was taken as a personal project by Linus Torvalds at the University of Helsinki in Finland that is similar to UNIX as an operating system.

2. Which of the following is similar to UNIX OS?
a) Windows NT
b) MS-DOS
c) Linux
d) Windows 3.1

View Answer

Answer: c [Reason:] The Linux is similar to UNIX operating system but it is entirely different for the Windows NT, MS-DOS and the Windows 3.1

3. Who had first described UNIX in an article?
a) Ken Thompson
b) Dennis Ritchie and Ken Thompson
c) Dennis Ritchie
d) Linus Torvalds

View Answer

Answer: b [Reason:] The UNIX was first described by Dennis Ritchie and Ken Thompson of Bell Research Labs in 1974 through an article.

4. What do MULTICS stand for?
a) multiplexed information and computing service
b) multiplexed information and code service
c) multiplexed inter-access code service
d) multiplexed inter-code sensor

View Answer

Answer: a [Reason:] MULTICS is a multiplexed information and computing service which generate software that would allow a large number of users for accessing the computer simultaneously.

5. Which of the following is the first version of the UNIX operating system?
a) PDP-2
b) Linux
c) MS-DOS
d) PDP-7

View Answer

Answer: d [Reason:] The PDP-7 processor is the first version of the UNIX which has a new filing system and new utilities.

6. Which of the following is a UNIX clone?
a) XENIX
b) Windows 3.1
c) Windows NT
d) Linux

View Answer

Answer: a [Reason:] The XENIX is a UNIX clone developed by the Motorola in the year 2979 and is ported to many processors.

7. Which of the following is an alternate source of UNIX?
a) MS-DOS
b) Windows 3.1
c) Windows NT
d) Linux

View Answer

Answer: a [Reason:] With the many disadvantages of the UNIX operating system, Linux was used as an alternative source. The UNIX operating system was more expensive operating system and most of the hardware was specific to the manufacturer, which restricted the use of UNIX and developed for an alternative one, the Linux.

8. Which of the following are grouped into directories and subdirectories?
a) register
b) memory
c) files
d) routines

View Answer

Answer: c [Reason:] The files are grouped into directories and subdirectories. This file system contains all the data files, commands, programs and special files which allow the access to the physical computer system. The file system of the Linux operating system is similar to the UNIX operating system.

9. Which character is known as root directory?
a) ^
b) &
c) &&
d) /

View Answer

Answer: d [Reason:] The character / is used in the beginning of the file name or the path name which is used as the starting point and is known as the root directory or root.

10. How many types of Linux files are typically used?
a) 2
b) 3
c) 4
d) 5

View Answer

Answer: c [Reason:] There are four types of Linux files. These are regular, special, directories and named pipes.

Set 5

1. Which of the following uses clock edge to generate an interrupt?
a) edge triggered
b) level-triggered
c) software interrupt
d) nmi

View Answer

Answer: a [Reason:] In the edge-triggered interrupt, the clock edge is used to generate an interrupt. The transition is from a logical low to high or vice versa.

2. In which interrupt, the trigger is dependent on the logic level?
a) edge triggered
b) level-triggered
c) software interrupt
d) nmi

View Answer

Answer: b [Reason:] In the level-triggered interrupt, the trigger is completely dependent on the logic level. The processors may require the level to be in a certain clock width so that the shorter pulses which are shorter than the minimum pulse width are ignored.

3. At which point the processor will start to internally process the interrupt?
a) interrupt pointer
b) instruction pointer
c) instruction boundary
d) interrupt boundary

View Answer

Answer: c [Reason:] After the recognition of the interrupt, and finds that it is not an error condition with the currently executing interrupt, then the interrupt will not be internally executed until the current execution has completed. This point is known as instruction boundary. At this point, the processor will start to internally process the interrupt.

4. What does 80×86 use to hold essential data?
a) stack frame
b) register
c) internal register
d) flag register

View Answer

Answer: a [Reason:] The MC68000 and 80×86 family use stack frame for holding the data whereas RISC processors use special internal registers.

5. What does the RISC processor use to hold the data?
a) flag register
b) accumulator
c) internal register
d) stack register

View Answer

Answer: c [Reason:] The RISC processors uses special internal registers to hold data whereas the 80×86 and MC68000 family uses stack register to hold the data.

6. Which of the following is a stack-based processor?
a) MC68000
b) PowerPC
c) ARM
d) DEC Alpha

View Answer

Answer: a [Reason:] The MC68000, Intel 80×86 and most of the b-bit controllers are based on the stack-based processors whereas PowerPC, DEC alpha, and ARM are RISC families which have a special internal register for holding the data.

7. Which of the following is used to reduce the external memory cycle?
a) internal hardware stack
b) internal software stack
c) external software stack
d) internal register

View Answer

Answer: a [Reason:] Some of the processors use internal hardware stack which helps in reducing the external memory cycle necessary to store the stack frame.

8. How many interrupt levels are supported in the MC68000?
a) 2
b) 3
c) 4
d) 7

View Answer

Answer: d [Reason:] The MC68000 has an external stack for holding the data. The MC68000 family supports a seven interrupt level which are encoded into three interrupt pins.

9. How many interrupt pins are used in MC68000?
a) 2
b) 3
c) 4
d) 5

View Answer

Answer: b [Reason:] The MC68000 family supports a seven interrupt level which are encoded into three interrupt pins. These interrupt pins are IP0, IP1, and IP2.

10. Which priority encoder is used in MC68000?
a) 4-to-2 priority encoder
b) LS148 7-to-3
c) 2-to-4 priority encoder
d) LS148 3-to-7

View Answer

Answer: b [Reason:] The LS148 7-to-3 priority encoder is used in MC68000. This converts the seven external pins into a three-bit binary code.

11. Which of the following converts the seven external pins into a 3-bit binary code?
a) priority encoder
b) 4-to-2 priority encoder
c) LS148 7-to-3
d) 2-to-4 priority encoder

View Answer

Answer: c [Reason:] The LS148 7-to-3 priority encoder can convert the seven external pins into a three-bit binary code.

12. Which of the following ensures the recognition of the interrupt?
a) interrupt ready
b) interrupt acknowledge
c) interrupt terminal
d) interrupt start

View Answer

Answer: b [Reason:] The interrupt level remains asserted until its interrupt acknowledgement cycle ensures the recognition of the interrupt.

13. Which of the following is raised to the interrupt level to prevent the multiple interrupt request?
a) internal interrupt mask
b) external interrupt mask
c) non-maskable interrupt
d) software interrupt

View Answer

Answer: a [Reason:] The internal interrupt mask is raised to the interrupt level, in order to prevent the multiple interrupt acknowledgements.

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