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# Multiple choice question for engineering

## Set 1

1. In a three-phase half wave rectifier usually, the primary side of the transformer is delta connected because
a) it has no neutral connection
b) we can get greater output voltage
c) it provides a path for the triplen harmonics
d) it provides better temperature stability

Answer: c [Reason:] The delta connected winding help circulating and eliminating the triplen (3rd order) harmonics.

2. The diode rectifier circuit given below is that of a a) three-phase half wave common cathode arrangement
b) three-phase half wave common anode arrangement
c) three-phase full wave common cathode arrangement
d) three-phase full wave common anode arrangement

Answer: b [Reason:] Common anode arrangement because all the anodes are connected to the load side.

3. In a three-phase half wave diode rectifier using 3 diodes, each diode conducts for
a) 90 degrees
b) 120 degrees
c) 180 degrees
d) 360 degrees

Answer: b [Reason:] Each diode conducts for 120 degrees, starting from ωt = 30 degrees.

4. In the below shown diode rectifier circuit, The diodes D1, D2 & D3 are connected to phases R,Y and B respectively as shown
The phase sequence is R-Y-B.
The diode D1 would conduct from
a) 0 to 90 degrees
b) 30 to 150 degrees
c) 0 to 180 degrees
d) 30 to 180 degrees

Answer: b [Reason:] It conducts from 30 to 150, for 90 degrees. D1 starts conducting first as it will be the most positive as it is connected to the R phase.

5. In the below shown diode rectifier circuit, The diodes D1, D2 & D3 are connected to phases R,Y and B receptively as shown
The phase sequence is R-Y-B.
The diode D3 conducts from
a) 0 to 270 degrees
b) 270 to 390 degrees
c) 270 to 450 degrees
d) 270 to 360 degrees

Answer: c [Reason:] It conducts from 270 to 450, for 120 degrees. D1 starts conducting first (from 30 degrees) as it will be the most positive as it is connected to the R phase & likewise.

6. In a three-phase half wave diode rectifier using 3 diodes,
a) All diodes conduct together
b) Only two diodes conduct at a time
c) Only one diode conducts at a time
d) None of the above mentioned

Answer: c [Reason:] 3 diodes, each conduct for 120 degree at a time.

7. In a three-phase half wave diode rectifier, if Vmp is the maximum phase voltage, then the output voltage on a R load varies from
a) 0 to Vmp
b) 0.5 Vmp to Vmp
c) Vmp to 3Vmp
d) –Vmp to Vmp

Answer: b [Reason:] The voltage value is positive and varies from (1/2)Vmp to Vmp.

8. The average value of the output voltage, in a 3-phase half wave diode rectifier with Vml as the maximum line voltage value, is given by the expression
a) Vml/3π
b) 2Vml/3π
c) 3Vml/2π
d) 3Vml

Answer: c Expression: The average value can be obtained by 3 x [ 1/2π x Vml sin ωt d(ωt) ] The integration runs from π/6 to 5π/6 as the diode is conducting for 120 degrees each.

9. In a three-phase half wave 6-pulse mid-point type diode rectifier, each diode conducts for
a) 120°
b) 60°
c) 90°
d) 180°

Answer: b [Reason:] In a six-pulse rectifier, each diode conducts once every one cycle, 60° x 6 diodes = 360°.

10. A step-down delta-star transformer, with per-phase turns ration of 5, is fed from a 3-phase, 1100 V, 50 Hz source. The secondary of this transformer through a 3-pulse type rectifier feeds a R load of 10 Ω. Find the maximum value of the load current (phase).
a) √2 x 22 A
b) 1 x 11 A
c) √2 x 11 A
d) 1 x 22 A

Answer: a [Reason:] Vph = 1100/5 = 220 V (Transformer ratio = 5) Vmp = √2 x 220 V Imp = Vmp/R.

## Set 2

1. An ideal diode has _________ &__________
a) some forward voltage drop, some reverse recovery time
b) high switching losses, high reverse voltage drop
c) no forward voltage drop, negligible reverse recovery time
d) no reverse recovery time, high leakage current

Answer: c [Reason:] An ideal diode has no losses and negligible reverse recovery time.

2. A diode circuit is so arranged that when the switch is open it’s KVL gives
Ri+ 1/C ∫i dt = 0
When the switch is closed,
Ri+ 1/C ∫i dt = Vs
Vs is the dc supply voltage.
The diode is so connected that it is forward biased when switch is closed
The circuit is mostly likely be a
a) diode in parallel with Vs, switch, R & C
b) diode in series with R, than parallel with Vs & C
c) diode in series with the switch, R, C & Vs
d) diode in series with R,C & Vs with the switch connected in parallel across Vs

Answer: c [Reason:] Examine the equation, the same current flows through R & C. Also when switch is open, the equation R.H.S is 0. Hence, all the elements are in series.

3. A circuit is so formed such that the source-R-C-diode-switch are in series. Consider the initial voltage across the C to be zero. The diode is so connected that it is forward biased when the switch is closed. When the switch is closed,
a) the current will decay exponentially & the voltage will increase exponentially
b) the current will increase exponentially & the voltage will increase exponentially
c) the current will fall to zero & the voltage both will decay exponentially
d) the voltage and current both remain constant

Answer: a [Reason:] Instant switch is closed, the current is maximum Vs/R than starts to reduce, whereas voltage starts to increase from 0 to Vs (Capacitor Charging).

4. The time constant of a series RC circuit (τ) is given by
a) R/C
b) C/R
c) RC
d) 1/RC

Answer: c [Reason:] For a series RC circuit, τ = RC.

5. A circuit is so formed such that source-R-L-diode-switch are all in series. Consider the initial current in L to be zero. The diode is so connected that it is forward biased when switch is closed.
When the switch is closed,
a) the current will decay exponentially & the voltage will increase exponentially
b) the current will increase exponentially & the voltage will decay exponentially
c) the current will fall to zero & the voltage both will decay exponentially
d) the voltage and the current both remain constant

Answer: b [Reason:] Instant switch is closed, the current is minimum zero than starts to increase till it reaches a constant value Vs/R, whereas voltage starts to reduce from Vs to 0 (Inductor Charging).

6. In the figure shown below, As the switch (shown in the green) is pressed, the voltage across the diode(ideally)
a) increases to Vs/R
b) increases to Vs
c) decreases to zero
d) remains Constant

Answer: c [Reason:] As the switch is pressed, current starts to flow & the whole supply voltage (ideally) appears across the load R & voltage across the diode is zero.

7. For a diode circuit the voltage across the capacitor is given by
Vc(t)= Vs(1-e(-t/RC))
Then the initial rate of change of capacitor voltage is given by
a) 0
b) ∞
c) Vs x RC
d) Vs/RC

Answer: d [Reason:] Find d(Vc)/dt and put t = 0.

8. In the circuit show below, The initial current through the inductor is zero. When the switch (shown in green) is closed, then the current through the inductor
a) decreases from Vs/R to 0
b) increases from zero to Vs/R
c) decreases from Vs/L to 0
d) increases from zero to Vs/L

Answer: b [Reason:] Current increases from zero to maximum value gradually due to the L nature. The KVL when switch is closed gives, Ri + Ldi/dt = Vs Solve for i(t). Maximum value comes out to be Vs/R.

9. In the figure shown below, When the switch is open, the voltage across the diode (ideally)
a) is Vs/R
b) is Vs
c) is zero
d) none of the mentioned

Answer: b [Reason:] When the switch is open, the diode experiences all the supply voltage.

10. The time constant of a series RL circuit (τ) is given by
a) R/L
b) L/R
c) RC
d) 1/RL

Answer: a [Reason:] The time constant τ for a series RL circuit is R/L.

## Set 3

1. For the initially relaxed circuit shown below, KVL with switch in the closed position gives a certain equation. The Laplace of this equation will have the right hand side (RHS) as a) Vs
b) (Vs x s)/RC
c) Vs/s
d) RC/s

Answer: c [Reason:] When switch is closed, Ldi/dt + 1/C ∫ idt = Vs Laplace of the above gives, L[sI(s)] + 1/C [I(s)/s] = Vs/s.

2. For the initially relaxed circuit shown below, the Laplace transform of the KVL when the switch is closed is I(s) [ X ] = Vs/s
The value of X is
a) sL + 1/C
b) Cs + 1/sL
c) sL + 1/sC
d) Vs/CLs

Answer: c [Reason:] When switch is closed, Ldi/dt + 1/C ∫ idt = Vs Laplace of the above gives, L[sI(s)] + 1/C [I(s)/s] = Vs/s.

3. For the initially relaxed circuit shown below, if Ω=1/√LC. Then the current is a function of ___ a) cos Ωt
b) sin Ωt
c) tan Ωt
d) cos Ωt.sin Ωt

Answer: b [Reason:] When switch is closed, Ldi/dt + 1/C ∫ idt = Vs Laplace of the above gives, L[sI(s)] + 1/C [I(s)/s] = Vs/s I(s) = Vs/(LΩ) * (Ω/Ω2 + s2) Taking the inverse lapace gives, I(t) = Vs * √ (L/C) * sin Ωt.

4. For the circuit shown below, the capacitor is initially charged to a voltage of Vo with the upper plate positive. After the switch (shown in green) is closed, the current through the load a) increases from zero to Vo/R
b) decreases from Vo/R to zero
c) increases from zero to Vo/C
d) decreases from Vo/C to zero

Answer: b [Reason:] The capacitor acts as a source. At instant switch is closed the current is maximum and than discharges till zero value through the load R.

5. For the circuit shown below, the capacitor is initially charged to a voltage of Vo with the upper plate positive. Switch is closed at t=0. The peak value of the current through the diode is a) Vo/C
b) Vo/R
c) Vo
d) Vo/(RC)

Answer: b [Reason:] When switch is closed, the equation is Ri + 1/C ∫idt = 0 (Voltage across capacitor cannot change instantaneously) Solution of the above equation gives, Vo/R at t= 0.

6. When the switch (shown in green) is closed, the average current through the diode in the positive cycle is a) 0
b) Vs/R
c) Vs/(R+Rd)
d) none of the mentioned

Answer: a [Reason:] The switch S.C’s the source.

7. When the switch is closed, the steady state current through the diode is a) Vo/C
b) Vo/R
c) Vo
d) Vo/(RC)

Answer: b [Reason:] I = Vo/R

8. When the switch is open, the current through the diode in the positive cycle is a) zero
b) Vs/R
c) Vs/(R+Rd)
d) none of the mentioned

Answer: c [Reason:] When the switch is open, the diode is forward biased and I = Vs/(Rd + R). Where, Rd is the diode resistance.

9. For the circuit shown in the figure below, consider the diode as an ideal diode & R.M.S value of source voltage as Vs. The output voltage waveform at R is most likely to have
a) zero value in the positive half cycle and a peak value of 1.414Vs in the negative half cycle
b) sine-wave nature with a peak value 1.414Vs
c) zero value in the negative half cycle and a peak value of 1.414Vs in the positive half cycle
d) sine-wave nature with a peak value Vs

Answer: a [Reason:] The diode S.C’s the load in the positive half cycle.

10. For the circuit shown in the figure below, V8 is AC voltage source with peak value Vm. The waveform of the load voltage at the resistor is a) zero in the positive half & peak value of –(Vm) negative half
b) zero in the negative half & peak value of –(Vm-V1) in the positive half
c) zero in the positive half & peak value of –(Vm+V1) negative half
d) zero in the positive half & peak value of –(Vm-V1) negative half

Answer: d [Reason:] Diode is reversed biased in the positive half cycle. In the negative half cycle, apply KVL to get the value of peak voltage at the load.

## Set 4

1. For the circuit shown in the figure below, consider the diode as an ideal diode & rms value of source voltage as Vs. The output voltage waveform at R will have
a) zero value in the positive half cycle and a peak value of 1.414Vs in the negative half cycle
b) sine-wave nature with a peak value 1.414Vs
c) zero value in the negative half cycle and a peak value of 1.414Vs in the positive half cycle
d) sine-wave nature with a peak value Vs

Answer: c [Reason:] The diode short circuits the load in the negative half cycle. The peak value in the positive half is 1.414 x Vs.

2. For the circuit shown in the figure below, Vs is the ac voltage source with peak value Vm. The waveform of the load voltage at the resistor will have a) zero value in the positive half cycle and a peak value of –(Vm) in the negative half cycle
b) zero value in the negative half cycle and a peak value of –(Vm-V1) in the positive half cycle
c) zero value in the positive half cycle and a peak value of –(Vm+V1) in the negative half cycle
d) zero value in the positive half cycle and a peak value of –(Vm-V1) in the negative half

Answer: c [Reason:] Diode is reversed biased in the positive half cycle. In the negative half cycle, apply KVL to get the value of peak voltage at the load.

3. For the circuit shown below, Vs=230V, Voltage drop across the diode (Vd) = 2V
The peak value of voltage at R in the positive and the negative half cycles are ___ & ___ respectively.
a) 323V,0V
b) 0V, 323V
c) 327V, 0V
d) 0V, 327V

Answer: b [Reason:] Load is S.C in the positive half cycle hence, voltage is zero. In negative half the peak value is (230 x 1.414) – 2(drop across the diode) = 323 Volts.

4. For the circuit shown in the figure below, V9 is the AC voltage source with peak value Vm. The waveform of the load voltage at the resistor has a a) peak value of (Vm+V1) in the negative half cycle
b) peak value of (Vm-V1) in the positive half cycle
c) peak value of (Vm+V1) in the positive half cycle
d) peak value of (Vm-V1) in the negative half cycle

Answer: c [Reason:] Diode is reversed biased in the negative half cycle. In the positive half cycle, apply KVL to get the value of peak voltage at the load. Peak value = Vm + V1, as V1 is aiding the positive anode of the diode.

5. The circuit shown below has the following parameters: V1 = 8 Volts
V2 = 6 Volts
Vs = 10V/√2 (rms)
Voltage drop across D1 & D2 = 0.7 Volts
At the load (R), the peak value in the positive half cycle will be
a) 8.7 V
b) 6.7 V
c) 8 V
d) 10V/√2

Answer: a [Reason:] In the positive half, only D1 is active. Hence use KVL, Vo = 8 + 0.7 Volts.

6. The circuit shown below has the following parameters: Voltage drop across D1 & D2 = 0.7 Volts
V1 = 8 Volts
V2 = 6 Volts
Vs = 10V/√2 (RMS)
At the load (R), the peak value in the negative half cycle is
a) 8.7 V
b) 6.7 V
c) 8 V
d) 10V/√2

Answer: b [Reason:] In the negative half, only D2 is active. Hence use KVL, Vo = 6 + 0.7 Volts.

7. Consider the diode to be an ideal one and Vo = Vr + Vdc during positive half cycle. Thus, during the negative half cycle a) Vo = Vr
b) Vo = 0
c) Vo = Vdc+Vr
d) Vo = Vdc

Answer: d [Reason:] During the negative half diode is not conducting hence Vr (voltage across the resistor) = 0. Vo = Vdc.

8. When a diode is connected in series with an AC source & R load, the conduction time per cycle is
a) 0
b) 2π
c) π
d) π/2

Answer: c [Reason:] The diode is forward biased for half cycle (180 degrees) and reversed biased in the another 180 degrees. Hence, per cycle it only conducts for 180 degrees or π radians.

9. When diode is connected in series to an AC source & RL load, the conduction time for the diode
a) is always less than π
b) is 0
c) is π
d) can be greater than π

Answer: d [Reason:] For an R – L load, the inductively load can make the diode to force conducted hence, the conduction time can be greater than 180 degrees.

10. For the circuit shown below, Vdc = 50 V
Cut-in voltage for D1 = 0.2 V
Cut-in voltage for D2 = 0.6 V
R = 5KΩ
Current through D1 & D2 would be,
a) 5mA, 5mA
b) 10mA, 0
c) 0, 10mA
d) 9.98mA, 9.94mA

Answer: b [Reason:] As the cut-in voltage for D1 is lesser than D2, D1 would start conducting first & S.C D2. Hence, only D1 conducts with I = 50/5000 A.

## Set 5

1. IGBT possess
a) low input impedance
b) high input impedance
c) high on-state resistance
d) second breakdown problems

Answer: b [Reason:] Like MOSFET IGBT possess high input impedance.

2. IGBT & BJT both posses ___
a) low on-state power losses
b) high on-state power losses
c) low switching losses
d) high input impedance

Answer: a [Reason:] Low on state power loss is one of the best parameters of both BJT & the IGBT.

3. The three terminals of the IGBT are
a) base, emitter & collector
b) gate, source & drain
c) gate, emitter & collector
d) base, source & drain

Answer: c [Reason:] IGBT is a three terminal device. It has a gate, a emitter & a collector.

4. In IGBT, the p+ layer connected to the collector terminal is called as the
a) drift layer
b) injection layer
c) body layer
d) collector Layer

Answer: b [Reason:] It is called as a injection layer, because it injects holes into the n layer.

5. The controlling parameter in IGBT is the
a) IG
b) VGE
c) IC
d) VCE

Answer: b [Reason:] The controlling parameter is the gate to emitter voltage, as the device is a voltage controlled device.

6. In IGBT, the n layer above the p+ layer is called as the
a) drift layer
b) injection layer
c) body layer
d) collector Layer

Answer: a [Reason:] It is called as the drift layer because its thickness determines the voltage blocking capabilities of the device.

7. The voltage blocking capability of the IGBT is determined by the
a) injection layer
b) body layer
c) metal used for the contacts
d) drift layer

Answer: d [Reason:] The drift layer which is a n layer determines the voltage blocking capabilities.

8. The controlled parameter in IGBT is the
a) IG
b) VGE
c) IC
d) VCE

Answer: c [Reason:] The controlling parameter is the gate to collector current.

9. The structure of the IGBT is a
a) P-N-P structure connected by a MOS gate
b) N-N-P-P structure connected by a MOS gate
c) P-N-P-N structure connected by a MOS gate
d) N-P-N-P structure connected by a MOS gate

Answer: c [Reason:] The IGBT is a semiconductor device with four alternating layers (P-N-P-N) that are controlled by a metal-oxide-semiconductor (MOS) gate structure without regenerative action.

10. The major drawback of the first generation IGBTs was that, they had
a) latch-up problems
b) noise & secondary breakdown problems
c) sluggish operation
d) latch-up & secondary breakdown problems