Digital Electronic MCQ Set 1 1. What is ambiguous condition in a NAND based S’-R’ latch? a) S’=0, R’=1 b) S’=1, R’=0 c) S’=1, R’=1 d) S’=0, R’=0 AnswerAnswer: d [Reason:] In a NAND based S-R latch, If S’=0 & R’=0 then both the outputs (i.e. Q & Q’) goes HIGH and this condition is…
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